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| author | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-11 17:12:38 +0300 |
|---|---|---|
| committer | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-11 17:12:38 +0300 |
| commit | 4b9c2b707b1383b4e3b3c50e445afd0af8922788 (patch) | |
| tree | 08a4b0c596d66ab1d5e1bd313fbc0e465123d8d1 | |
| parent | 0724d898bb1c15872b1b59c01a9e9d9d74bb4f56 (diff) | |
| download | glibc-4b9c2b707b1383b4e3b3c50e445afd0af8922788.tar.xz glibc-4b9c2b707b1383b4e3b3c50e445afd0af8922788.zip | |
Vector sin for x86_64 and tests.
Here is implementation of vectorized sin containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* bits/libm-simd-decl-stubs.h: Added stubs for sin.
* math/bits/mathcalls.h: Added sin declaration with __MATHCALL_VEC.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
* sysdeps/x86/fpu/bits/math-vector.h: SIMD declaration for sin.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: New file.
* sysdeps/x86_64/fpu/svml_d_sin2_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_sin4_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_sin4_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_d_sin8_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_sin_data.S: New file.
* sysdeps/x86_64/fpu/svml_d_sin_data.h: New file.
* sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector sin test.
* sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
* NEWS: Mention addition of x86_64 vector sin.
30 files changed, 1333 insertions, 5 deletions
@@ -3,6 +3,37 @@ * configure.ac: More strict check for AVX512 assembler support. * configure: Regenerated. + * bits/libm-simd-decl-stubs.h: Added stubs for sin. + * math/bits/mathcalls.h: Added sin declaration with __MATHCALL_VEC. + * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added. + * sysdeps/x86/fpu/bits/math-vector.h: SIMD declaration for sin. + * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files. + * sysdeps/x86_64/fpu/Versions: New versions added. + * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated. + * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added + build of SSE, AVX2 and AVX512 IFUNC versions. + * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: New file. + * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: New file. + * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: New file. + * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: New file. + * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: New file. + * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: New file. + * sysdeps/x86_64/fpu/svml_d_sin2_core.S: New file. + * sysdeps/x86_64/fpu/svml_d_sin4_core.S: New file. + * sysdeps/x86_64/fpu/svml_d_sin4_core_avx.S: New file. + * sysdeps/x86_64/fpu/svml_d_sin8_core.S: New file. + * sysdeps/x86_64/fpu/svml_d_sin_data.S: New file. + * sysdeps/x86_64/fpu/svml_d_sin_data.h: New file. + * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector sin test. + * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise. + * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise. + * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise. + * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise. + * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise. + * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise. + * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise. + * NEWS: Mention addition of x86_64 vector sin. + 2015-06-11 Florian Weimer <fweimer@redhat.com> * nptl/pthread_key_create.c (__pthread_key_create): Fix typo in @@ -52,7 +52,7 @@ Version 2.22 condition in some applications. * Added vector math library named libmvec with the following vectorized x86_64 - implementations: cos, cosf. + implementations: cos, cosf, sin. The library can be disabled with --disable-mathvec. Use of the functions is enabled with -fopenmp -ffast-math starting from -O1 for GCC version >= 4.9.0. The library is linked in as needed when using -lm (no need to specify -lmvec diff --git a/bits/libm-simd-decl-stubs.h b/bits/libm-simd-decl-stubs.h index b1ba994350..50310d643a 100644 --- a/bits/libm-simd-decl-stubs.h +++ b/bits/libm-simd-decl-stubs.h @@ -37,4 +37,8 @@ #define __DECL_SIMD_cosf #define __DECL_SIMD_cosl +#define __DECL_SIMD_sin +#define __DECL_SIMD_sinf +#define __DECL_SIMD_sinl + #endif diff --git a/math/bits/mathcalls.h b/math/bits/mathcalls.h index 85a6a95a7c..fbe7a3a6af 100644 --- a/math/bits/mathcalls.h +++ b/math/bits/mathcalls.h @@ -62,7 +62,7 @@ __MATHCALL (atan2,, (_Mdouble_ __y, _Mdouble_ __x)); /* Cosine of X. */ __MATHCALL_VEC (cos,, (_Mdouble_ __x)); /* Sine of X. */ -__MATHCALL (sin,, (_Mdouble_ __x)); +__MATHCALL_VEC (sin,, (_Mdouble_ __x)); /* Tangent of X. */ __MATHCALL (tan,, (_Mdouble_ __x)); diff --git a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist index acabb8ae3a..1dddacd9e5 100644 --- a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist +++ b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist @@ -1,10 +1,14 @@ GLIBC_2.22 GLIBC_2.22 A _ZGVbN2v_cos F + _ZGVbN2v_sin F _ZGVbN4v_cosf F _ZGVcN4v_cos F + _ZGVcN4v_sin F _ZGVcN8v_cosf F _ZGVdN4v_cos F + _ZGVdN4v_sin F _ZGVdN8v_cosf F _ZGVeN16v_cosf F _ZGVeN8v_cos F + _ZGVeN8v_sin F diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h index b3ef8330e8..82b7c675d5 100644 --- a/sysdeps/x86/fpu/bits/math-vector.h +++ b/sysdeps/x86/fpu/bits/math-vector.h @@ -32,5 +32,7 @@ # define __DECL_SIMD_cos __DECL_SIMD_x86_64 # undef __DECL_SIMD_cosf # define __DECL_SIMD_cosf __DECL_SIMD_x86_64 +# undef __DECL_SIMD_sin +# define __DECL_SIMD_sin __DECL_SIMD_x86_64 # endif #endif diff --git a/sysdeps/x86_64/fpu/Makefile b/sysdeps/x86_64/fpu/Makefile index 454cfbad0b..25f8e336f5 100644 --- a/sysdeps/x86_64/fpu/Makefile +++ b/sysdeps/x86_64/fpu/Makefile @@ -1,7 +1,9 @@ ifeq ($(subdir),mathvec) libmvec-support += svml_d_cos2_core svml_d_cos4_core_avx \ svml_d_cos4_core svml_d_cos8_core \ - svml_d_cos_data svml_s_cosf4_core svml_s_cosf8_core_avx \ + svml_d_cos_data svml_d_sin2_core svml_d_sin4_core_avx \ + svml_d_sin4_core svml_d_sin8_core svml_d_sin_data \ + svml_s_cosf4_core svml_s_cosf8_core_avx \ svml_s_cosf8_core svml_s_cosf16_core svml_s_cosf_data \ init-arch endif diff --git a/sysdeps/x86_64/fpu/Versions b/sysdeps/x86_64/fpu/Versions index f85c28b924..af1769c8b6 100644 --- a/sysdeps/x86_64/fpu/Versions +++ b/sysdeps/x86_64/fpu/Versions @@ -1,6 +1,7 @@ libmvec { GLIBC_2.22 { _ZGVbN2v_cos; _ZGVcN4v_cos; _ZGVdN4v_cos; _ZGVeN8v_cos; + _ZGVbN2v_sin; _ZGVcN4v_sin; _ZGVdN4v_sin; _ZGVeN8v_sin; _ZGVbN4v_cosf; _ZGVcN8v_cosf; _ZGVdN8v_cosf; _ZGVeN16v_cosf; } } diff --git a/sysdeps/x86_64/fpu/libm-test-ulps b/sysdeps/x86_64/fpu/libm-test-ulps index ed152d85f6..d7184d8b2a 100644 --- a/sysdeps/x86_64/fpu/libm-test-ulps +++ b/sysdeps/x86_64/fpu/libm-test-ulps @@ -1929,6 +1929,18 @@ idouble: 1 ildouble: 3 ldouble: 3 +Function: "sin_vlen2": +double: 2 + +Function: "sin_vlen4": +double: 2 + +Function: "sin_vlen4_avx2": +double: 2 + +Function: "sin_vlen8": +double: 2 + Function: "sincos": ildouble: 1 ldouble: 1 diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile index 6b50475a2a..74da4cd4fe 100644 --- a/sysdeps/x86_64/fpu/multiarch/Makefile +++ b/sysdeps/x86_64/fpu/multiarch/Makefile @@ -54,6 +54,8 @@ endif ifeq ($(subdir),mathvec) libmvec-sysdep_routines += svml_d_cos2_core_sse4 svml_d_cos4_core_avx2 \ - svml_d_cos8_core_avx512 svml_s_cosf4_core_sse4 \ - svml_s_cosf8_core_avx2 svml_s_cosf16_core_avx512 + svml_d_cos8_core_avx512 svml_d_sin2_core_sse4 \ + svml_d_sin4_core_avx2 svml_d_sin8_core_avx512 \ + svml_s_cosf4_core_sse4 svml_s_cosf8_core_avx2 \ + svml_s_cosf16_core_avx512 endif diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S new file mode 100644 index 0000000000..29bd0a7b4d --- /dev/null +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S @@ -0,0 +1,38 @@ +/* Multiple versions of vectorized sin. + Copyright (C) 2014-2015 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <init-arch.h> + + .text +ENTRY (_ZGVbN2v_sin) + .type _ZGVbN2v_sin, @gnu_indirect_function + cmpl $0, KIND_OFFSET+__cpu_features(%rip) + jne 1f + call __init_cpu_features +1: leaq _ZGVbN2v_sin_sse4(%rip), %rax + testl $bit_SSE4_1, __cpu_features+CPUID_OFFSET+index_SSE4_1(%rip) + jz 2f + ret +2: leaq _ZGVbN2v_sin_sse2(%rip), %rax + ret +END (_ZGVbN2v_sin) +libmvec_hidden_def (_ZGVbN2v_sin) + +#define _ZGVbN2v_sin _ZGVbN2v_sin_sse2 +#include "../svml_d_sin2_core.S" diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S new file mode 100644 index 0000000000..4b4d8be272 --- /dev/null +++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S @@ -0,0 +1,229 @@ +/* Function sin vectorized with SSE4. + Copyright (C) 2014-2015 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include "svml_d_sin_data.h" + + .text +ENTRY (_ZGVbN2v_sin_sse4) +/* ALGORITHM DESCRIPTION: + + ( low accuracy ( < 4ulp ) or enhanced performance + ( half of correct mantissa ) implementation ) + + Argument representation: + arg = N*Pi + R + + Result calculation: + sin(arg) = sin(N*Pi + R) = (-1)^N * sin(R) + sin(R) is approximated by corresponding polynomial + */ + pushq %rbp + cfi_adjust_cfa_offset (8) + cfi_rel_offset (%rbp, 0) + movq %rsp, %rbp + cfi_def_cfa_register (%rbp) + andq $-64, %rsp + subq $320, %rsp + movaps %xmm0, %xmm5 + movq __svml_dsin_data@GOTPCREL(%rip), %rax + movups __dAbsMask(%rax), %xmm3 +/* + * ARGUMENT RANGE REDUCTION: + * X' = |X| + */ + movaps %xmm3, %xmm4 + +/* SignX - sign bit of X */ + andnps %xmm5, %xmm3 + movups __dInvPI(%rax), %xmm2 + andps %xmm5, %xmm4 + +/* Y = X'*InvPi + RS : right shifter add */ + mulpd %xmm4, %xmm2 + movups __dRShifter(%rax), %xmm6 + +/* R = X' - N*Pi1 */ + movaps %xmm4, %xmm0 + addpd %xmm6, %xmm2 + cmpnlepd __dRangeVal(%rax), %xmm4 + +/* N = Y - RS : right shifter sub */ + movaps %xmm2, %xmm1 + +/* SignRes = Y<<63 : shift LSB to MSB place for result sign */ + psllq $63, %xmm2 + subpd %xmm6, %xmm1 + movmskpd %xmm4, %ecx + movups __dPI1(%rax), %xmm7 + mulpd %xmm1, %xmm7 + movups __dPI2(%rax), %xmm6 + +/* R = R - N*Pi2 */ + mulpd %xmm1, %xmm6 + subpd %xmm7, %xmm0 + movups __dPI3(%rax), %xmm7 + +/* R = R - N*Pi3 */ + mulpd %xmm1, %xmm7 + subpd %xmm6, %xmm0 + movups __dPI4(%rax), %xmm6 + +/* R = R - N*Pi4 */ + mulpd %xmm6, %xmm1 + subpd %xmm7, %xmm0 + subpd %xmm1, %xmm0 + +/* + * POLYNOMIAL APPROXIMATION: + * R2 = R*R + */ + movaps %xmm0, %xmm1 + mulpd %xmm0, %xmm1 + +/* R = R^SignRes : update sign of reduced argument */ + xorps %xmm2, %xmm0 + movups __dC7(%rax), %xmm2 + mulpd %xmm1, %xmm2 + addpd __dC6(%rax), %xmm2 + mulpd %xmm1, %xmm2 + addpd __dC5(%rax), %xmm2 + mulpd %xmm1, %xmm2 + addpd __dC4(%rax), %xmm2 + +/* Poly = C3+R2*(C4+R2*(C5+R2*(C6+R2*C7))) */ + mulpd %xmm1, %xmm2 + addpd __dC3(%rax), %xmm2 + +/* Poly = R2*(C1+R2*(C2+R2*Poly)) */ + mulpd %xmm1, %xmm2 + addpd __dC2(%rax), %xmm2 + mulpd %xmm1, %xmm2 + addpd __dC1(%rax), %xmm2 + mulpd %xmm2, %xmm1 + +/* Poly = Poly*R + R */ + mulpd %xmm0, %xmm1 + addpd %xmm1, %xmm0 + +/* + * RECONSTRUCTION: + * Final sign setting: Res = Poly^SignX + */ + xorps %xmm3, %xmm0 + testl %ecx, %ecx + jne .LBL_1_3 + +.LBL_1_2: + cfi_remember_state + movq %rbp, %rsp + cfi_def_cfa_register (%rsp) + popq %rbp + cfi_adjust_cfa_offset (-8) + cfi_restore (%rbp) + ret + +.LBL_1_3: + cfi_restore_state + movups %xmm5, 192(%rsp) + movups %xmm0, 256(%rsp) + je .LBL_1_2 + + xorb %dl, %dl + xorl %eax, %eax + movups %xmm8, 112(%rsp) + movups %xmm9, 96(%rsp) + movups %xmm10, 80(%rsp) + movups %xmm11, 64(%rsp) + movups %xmm12, 48(%rsp) + movups %xmm13, 32(%rsp) + movups %xmm14, 16(%rsp) + movups %xmm15, (%rsp) + movq %rsi, 136(%rsp) + movq %rdi, 128(%rsp) + movq %r12, 168(%rsp) + cfi_offset_rel_rsp (12, 168) + movb %dl, %r12b + movq %r13, 160(%rsp) + cfi_offset_rel_rsp (13, 160) + movl %ecx, %r13d + movq %r14, 152(%rsp) + cfi_offset_rel_rsp |
