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authorH.J. Lu <hjl.tools@gmail.com>2016-04-15 05:22:53 -0700
committerH.J. Lu <hjl.tools@gmail.com>2016-06-06 13:27:08 -0700
commit601a5ed0cfe7ec825664ccd8112918f879eeeebc (patch)
tree0beb6f272d3abd4e61ddcfd9f3bf0e6aae4da907
parent9e1ddc1180ca0619d12b620b227726233a48b9bc (diff)
downloadglibc-601a5ed0cfe7ec825664ccd8112918f879eeeebc.tar.xz
glibc-601a5ed0cfe7ec825664ccd8112918f879eeeebc.zip
Detect Intel Goldmont and Airmont processors
Updated from the model numbers of Goldmont and Airmont processors in Intel64 And IA-32 Processor Architectures Software Developer's Manual Volume 3 Revision 058. * sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel Goldmont and Airmont processors.
-rw-r--r--sysdeps/x86/cpu-features.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 963b845916..a5fa81f709 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -140,6 +140,14 @@ init_cpu_features (struct cpu_features *cpu_features)
cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
|= bit_arch_Prefer_No_VZEROUPPER;
+ case 0x5c:
+ case 0x5f:
+ /* Unaligned load versions are faster than SSSE3
+ on Goldmont. */
+
+ case 0x4c:
+ /* Airmont is a die shrink of Silvermont. */
+
case 0x37:
case 0x4a:
case 0x4d: