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2025-04-14x86: Detect Intel Diamond Rapidsrelease/2.39/masterH.J. Lu1-0/+12
2025-04-14x86: Handle unknown Intel processor with default tuningSunil K Pandey1-143/+143
2025-04-14x86: Add ARL/PTL/CWF model detection supportSunil K Pandey1-0/+10
2025-04-14x86: Optimize xstate size calculationSunil K Pandey2-56/+24
2025-04-14x86: Use `Avoid_Non_Temporal_Memset` to control non-temporal pathNoah Goldstein2-8/+23
2025-04-14x86: Tunables may incorrectly set Prefer_PMINUB_for_stringop (bug 32047)Florian Weimer1-0/+1
2025-04-14x86: Disable non-temporal memset on Skylake ServerNoah Goldstein5-12/+26
2025-04-14x86: Fix value for `x86_memset_non_temporal_threshold` when it is undesirableNoah Goldstein1-3/+3
2025-04-14x86: Enable non-temporal memset tunable for AMDJoe Damato1-4/+4
2025-04-14x86: Add seperate non-temporal tunable for memsetNoah Goldstein7-6/+49
2025-03-31x86: Link tst-gnu2-tls2-x86-noxsave{,c,xsavec} with libpthreadFlorian Weimer1-0/+3
2025-03-29x86: Use separate variable for TLSDESC XSAVE/XSAVEC state size (bug 32810)Florian Weimer10-8/+41
2025-03-29x86: Skip XSAVE state size reset if ISA level requires XSAVEFlorian Weimer1-0/+5
2025-03-19x86_64: Add atanh with FMASunil K Pandey5-0/+51
2025-03-19x86_64: Add sinh with FMASunil K Pandey5-0/+58
2025-03-19x86_64: Add tanh with FMASunil K Pandey4-0/+49
2025-03-19x86-64: Exclude FMA4 IFUNC functions for -mapxfH.J. Lu6-9/+70
2025-03-12nptl: clear the whole rseq area before registrationMichael Jeanson2-6/+6
2025-02-28math: Improve layout of exp/exp10 dataWilco Dijkstra1-2/+4
2025-02-28AArch64: Use prefer_sve_ifuncs for SVE memsetWilco Dijkstra1-1/+1
2025-02-28AArch64: Add SVE memsetWilco Dijkstra4-0/+129
2025-02-28math: Improve layout of expf dataWilco Dijkstra1-1/+1
2025-02-28AArch64: Remove zva_128 from memsetWilco Dijkstra1-24/+1
2025-02-28AArch64: Optimize memsetWilco Dijkstra1-111/+84
2025-02-28AArch64: Improve generic strlenWilco Dijkstra1-12/+27
2025-02-27AArch64: Improve codegen for SVE logsYat Long Poon4-47/+114
2025-02-27AArch64: Improve codegen in SVE tansLuna Lamb2-41/+68
2025-02-27AArch64: Improve codegen of AdvSIMD atan(2)(f)Joana Cruz3-68/+160
2025-02-27AArch64: Improve codegen of AdvSIMD logf function familyJoana Cruz3-40/+66
2025-02-27AArch64: Improve codegen in AdvSIMD logsPierre Blanchard3-106/+140
2025-02-27AArch64: Simplify rounding-multiply pattern in several AdvSIMD routinesJoe Ramsay5-38/+30
2025-02-27aarch64: Avoid redundant MOVs in AdvSIMD F32 logsJoe Ramsay3-45/+72
2025-02-27aarch64: Fix AdvSIMD libmvec routines for big-endianJoe Ramsay8-31/+39
2025-02-13assert: Add test for CVE-2025-0395Siddhesh Poyarekar2-0/+93
2025-01-25stdlib: Test using setenv with updated environ [BZ #32588]H.J. Lu2-0/+37
2025-01-24malloc: obscure calloc use in tst-callocSam James1-4/+8
2025-01-24Hide all malloc functions from compiler [BZ #32366]H.J. Lu6-5/+30
2025-01-22Fix underallocation of abort_msg_s struct (CVE-2025-0395)Siddhesh Poyarekar3-2/+11
2025-01-08x86/string: Fixup alignment of main loop in str{n}cmp-evex [BZ #32212]Noah Goldstein1-13/+13
2025-01-08x86: Improve large memset perf with non-temporal stores [RHEL-29312]Noah Goldstein1-58/+91
2024-12-17x86: Avoid integer truncation with large cache sizes (bug 32470)Florian Weimer2-2/+3
2024-12-11math: Exclude internal math symbols for tests [BZ #32414]H.J. Lu2-1/+6
2024-12-10malloc: add indirection for malloc(-like) functions in tests [BZ #32366]Sam James9-2/+53
2024-12-06Pass -nostdlib -nostartfiles together with -r [BZ #31753]H.J. Lu1-1/+2
2024-12-06nptl: initialize cpu_id_start prior to rseq registrationMichael Jeanson1-0/+1
2024-12-06nptl: initialize rseq area prior to registrationMichael Jeanson2-0/+12
2024-10-29elf: Change ldconfig auxcache magic number (bug 32231)Florian Weimer2-1/+2
2024-10-18Make tst-strtod-underflow type-genericJoseph Myers1-60/+297
2024-10-01Add crt1-2.0.o for glibc 2.0 compatibility testsH.J. Lu7-2/+102
2024-09-27Add tests of more strtod special casesJoseph Myers1-0/+14
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