| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2016-05-20 | Count number of logical processors sharing L2 cachehjl/cache/master | H.J. Lu | 1 | -34/+116 |
| 2016-05-20 | Remove special L2 cache case for Knights Landing | H.J. Lu | 1 | -2/+0 |
| 2016-05-19 | Correct Intel processor level type mask from CPUID | H.J. Lu | 1 | -1/+1 |
| 2016-05-19 | Check the HTT bit before counting logical threads | H.J. Lu | 1 | -76/+82 |
| 2016-05-13 | Support non-inclusive caches on Intel processors | H.J. Lu | 1 | -1/+11 |
| 2016-05-08 | Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86 | H.J. Lu | 1 | -0/+673 |
