From d360dcc001cb12504cd3e8dbddee20df6bebb0f8 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 29 Dec 2023 08:43:52 -0800 Subject: x86/cet: Check feature_1 in TCB for active IBT and SHSTK Initially, IBT and SHSTK are marked as active when CPU supports them and CET are enabled in glibc. They can be disabled early by tunables before relocation. Since after relocation, GLRO(dl_x86_cpu_features) becomes read-only, we can't update GLRO(dl_x86_cpu_features) to mark IBT and SHSTK as inactive. Instead, check the feature_1 field in TCB to decide if IBT and SHST are active. --- sysdeps/x86/bits/platform/x86.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'sysdeps/x86/bits') diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 1e23d53ba2..1575ae53fb 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -337,3 +337,11 @@ enum x86_cpu_AVX10_YMM = x86_cpu_index_24_ecx_0_ebx + 17, x86_cpu_AVX10_ZMM = x86_cpu_index_24_ecx_0_ebx + 18, }; + +/* Bits in the feature_1 field in TCB. */ + +enum +{ + x86_feature_1_ibt = 1U << 0, + x86_feature_1_shstk = 1U << 1 +}; -- cgit v1.2.3