x86-64: Add vector log10/log10f implementation to libmvec

Implement vectorized log10/log10f containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector log10/log10f with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>

50 files changed, 3758 insertions, 1 deletions

diff --git a/bits/libm-simd-decl-stubs.h b/bits/libm-simd-decl-stubs.h
index 31878bf4ed..4ad584c227 100644
--- a/bits/libm-simd-decl-stubs.h
+++ b/bits/libm-simd-decl-stubs.h
@@ -219,4 +219,15 @@
 #define __DECL_SIMD_atan2f32x
 #define __DECL_SIMD_atan2f64x
 #define __DECL_SIMD_atan2f128x
+
+#define __DECL_SIMD_log10
+#define __DECL_SIMD_log10f
+#define __DECL_SIMD_log10l
+#define __DECL_SIMD_log10f16
+#define __DECL_SIMD_log10f32
+#define __DECL_SIMD_log10f64
+#define __DECL_SIMD_log10f128
+#define __DECL_SIMD_log10f32x
+#define __DECL_SIMD_log10f64x
+#define __DECL_SIMD_log10f128x
 #endif
diff --git a/math/bits/mathcalls.h b/math/bits/mathcalls.h
index 1bd4911993..f21384758a 100644
--- a/math/bits/mathcalls.h
+++ b/math/bits/mathcalls.h
@@ -104,7 +104,7 @@ __MATHCALL (ldexp,, (_Mdouble_ __x, int __exponent));
 __MATHCALL_VEC (log,, (_Mdouble_ __x));
 
 /* Base-ten logarithm of X.  */
-__MATHCALL (log10,, (_Mdouble_ __x));
+__MATHCALL_VEC (log10,, (_Mdouble_ __x));
 
 /* Break VALUE into integral and fractional parts.  */
 __MATHCALL (modf,, (_Mdouble_ __x, _Mdouble_ *__iptr)) __nonnull ((2));
diff --git a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
index 2b3b8d3886..8108a2a189 100644
--- a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
+++ b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
@@ -54,6 +54,7 @@ GLIBC_2.35 _ZGVbN2v_cosh F
 GLIBC_2.35 _ZGVbN2v_exp10 F
 GLIBC_2.35 _ZGVbN2v_exp2 F
 GLIBC_2.35 _ZGVbN2v_expm1 F
+GLIBC_2.35 _ZGVbN2v_log10 F
 GLIBC_2.35 _ZGVbN2v_sinh F
 GLIBC_2.35 _ZGVbN2vv_atan2 F
 GLIBC_2.35 _ZGVbN2vv_hypot F
@@ -65,6 +66,7 @@ GLIBC_2.35 _ZGVbN4v_coshf F
 GLIBC_2.35 _ZGVbN4v_exp10f F
 GLIBC_2.35 _ZGVbN4v_exp2f F
 GLIBC_2.35 _ZGVbN4v_expm1f F
+GLIBC_2.35 _ZGVbN4v_log10f F
 GLIBC_2.35 _ZGVbN4v_sinhf F
 GLIBC_2.35 _ZGVbN4vv_atan2f F
 GLIBC_2.35 _ZGVbN4vv_hypotf F
@@ -76,6 +78,7 @@ GLIBC_2.35 _ZGVcN4v_cosh F
 GLIBC_2.35 _ZGVcN4v_exp10 F
 GLIBC_2.35 _ZGVcN4v_exp2 F
 GLIBC_2.35 _ZGVcN4v_expm1 F
+GLIBC_2.35 _ZGVcN4v_log10 F
 GLIBC_2.35 _ZGVcN4v_sinh F
 GLIBC_2.35 _ZGVcN4vv_atan2 F
 GLIBC_2.35 _ZGVcN4vv_hypot F
@@ -87,6 +90,7 @@ GLIBC_2.35 _ZGVcN8v_coshf F
 GLIBC_2.35 _ZGVcN8v_exp10f F
 GLIBC_2.35 _ZGVcN8v_exp2f F
 GLIBC_2.35 _ZGVcN8v_expm1f F
+GLIBC_2.35 _ZGVcN8v_log10f F
 GLIBC_2.35 _ZGVcN8v_sinhf F
 GLIBC_2.35 _ZGVcN8vv_atan2f F
 GLIBC_2.35 _ZGVcN8vv_hypotf F
@@ -98,6 +102,7 @@ GLIBC_2.35 _ZGVdN4v_cosh F
 GLIBC_2.35 _ZGVdN4v_exp10 F
 GLIBC_2.35 _ZGVdN4v_exp2 F
 GLIBC_2.35 _ZGVdN4v_expm1 F
+GLIBC_2.35 _ZGVdN4v_log10 F
 GLIBC_2.35 _ZGVdN4v_sinh F
 GLIBC_2.35 _ZGVdN4vv_atan2 F
 GLIBC_2.35 _ZGVdN4vv_hypot F
@@ -109,6 +114,7 @@ GLIBC_2.35 _ZGVdN8v_coshf F
 GLIBC_2.35 _ZGVdN8v_exp10f F
 GLIBC_2.35 _ZGVdN8v_exp2f F
 GLIBC_2.35 _ZGVdN8v_expm1f F
+GLIBC_2.35 _ZGVdN8v_log10f F
 GLIBC_2.35 _ZGVdN8v_sinhf F
 GLIBC_2.35 _ZGVdN8vv_atan2f F
 GLIBC_2.35 _ZGVdN8vv_hypotf F
@@ -120,6 +126,7 @@ GLIBC_2.35 _ZGVeN16v_coshf F
 GLIBC_2.35 _ZGVeN16v_exp10f F
 GLIBC_2.35 _ZGVeN16v_exp2f F
 GLIBC_2.35 _ZGVeN16v_expm1f F
+GLIBC_2.35 _ZGVeN16v_log10f F
 GLIBC_2.35 _ZGVeN16v_sinhf F
 GLIBC_2.35 _ZGVeN16vv_atan2f F
 GLIBC_2.35 _ZGVeN16vv_hypotf F
@@ -131,6 +138,7 @@ GLIBC_2.35 _ZGVeN8v_cosh F
 GLIBC_2.35 _ZGVeN8v_exp10 F
 GLIBC_2.35 _ZGVeN8v_exp2 F
 GLIBC_2.35 _ZGVeN8v_expm1 F
+GLIBC_2.35 _ZGVeN8v_log10 F
 GLIBC_2.35 _ZGVeN8v_sinh F
 GLIBC_2.35 _ZGVeN8vv_atan2 F
 GLIBC_2.35 _ZGVeN8vv_hypot F
diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h
index 62f2890ab3..64e80ada7a 100644
--- a/sysdeps/x86/fpu/bits/math-vector.h
+++ b/sysdeps/x86/fpu/bits/math-vector.h
@@ -102,6 +102,10 @@
 #  define __DECL_SIMD_atan2 __DECL_SIMD_x86_64
 #  undef __DECL_SIMD_atan2f
 #  define __DECL_SIMD_atan2f __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_log10
+#  define __DECL_SIMD_log10 __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_log10f
+#  define __DECL_SIMD_log10f __DECL_SIMD_x86_64
 
 # endif
 #endif
diff --git a/sysdeps/x86/fpu/finclude/math-vector-fortran.h b/sysdeps/x86/fpu/finclude/math-vector-fortran.h
index 2269b74d50..f5050c68af 100644
--- a/sysdeps/x86/fpu/finclude/math-vector-fortran.h
+++ b/sysdeps/x86/fpu/finclude/math-vector-fortran.h
@@ -50,6 +50,8 @@
 !GCC$ builtin (cbrtf) attributes simd (notinbranch) if('x86_64')
 !GCC$ builtin (atan2) attributes simd (notinbranch) if('x86_64')
 !GCC$ builtin (atan2f) attributes simd (notinbranch) if('x86_64')
+!GCC$ builtin (log10) attributes simd (notinbranch) if('x86_64')
+!GCC$ builtin (log10f) attributes simd (notinbranch) if('x86_64')
 
 !GCC$ builtin (cos) attributes simd (notinbranch) if('x32')
 !GCC$ builtin (cosf) attributes simd (notinbranch) if('x32')
@@ -85,3 +87,5 @@
 !GCC$ builtin (cbrtf) attributes simd (notinbranch) if('x32')
 !GCC$ builtin (atan2) attributes simd (notinbranch) if('x32')
 !GCC$ builtin (atan2f) attributes simd (notinbranch) if('x32')
+!GCC$ builtin (log10) attributes simd (notinbranch) if('x32')
+!GCC$ builtin (log10f) attributes simd (notinbranch) if('x32')
diff --git a/sysdeps/x86_64/fpu/Makeconfig b/sysdeps/x86_64/fpu/Makeconfig
index 96a40856fa..ba37044e9d 100644
--- a/sysdeps/x86_64/fpu/Makeconfig
+++ b/sysdeps/x86_64/fpu/Makeconfig
@@ -35,6 +35,7 @@ libmvec-funcs = \
   expm1 \
   hypot \
   log \
+  log10 \
   pow \
   sin \
   sincos \
diff --git a/sysdeps/x86_64/fpu/Versions b/sysdeps/x86_64/fpu/Versions
index f58c98eb45..8beaf0736f 100644
--- a/sysdeps/x86_64/fpu/Versions
+++ b/sysdeps/x86_64/fpu/Versions
@@ -22,6 +22,7 @@ libmvec {
     _ZGVbN2v_exp10; _ZGVcN4v_exp10; _ZGVdN4v_exp10; _ZGVeN8v_exp10;
     _ZGVbN2v_exp2; _ZGVcN4v_exp2; _ZGVdN4v_exp2; _ZGVeN8v_exp2;
     _ZGVbN2v_expm1; _ZGVcN4v_expm1; _ZGVdN4v_expm1; _ZGVeN8v_expm1;
+    _ZGVbN2v_log10; _ZGVcN4v_log10; _ZGVdN4v_log10; _ZGVeN8v_log10;
     _ZGVbN2v_sinh; _ZGVcN4v_sinh; _ZGVdN4v_sinh; _ZGVeN8v_sinh;
     _ZGVbN2vv_atan2; _ZGVcN4vv_atan2; _ZGVdN4vv_atan2; _ZGVeN8vv_atan2;
     _ZGVbN2vv_hypot; _ZGVcN4vv_hypot; _ZGVdN4vv_hypot; _ZGVeN8vv_hypot;
@@ -33,6 +34,7 @@ libmvec {
     _ZGVbN4v_exp10f; _ZGVcN8v_exp10f; _ZGVdN8v_exp10f; _ZGVeN16v_exp10f;
     _ZGVbN4v_exp2f; _ZGVcN8v_exp2f; _ZGVdN8v_exp2f; _ZGVeN16v_exp2f;
     _ZGVbN4v_expm1f; _ZGVcN8v_expm1f; _ZGVdN8v_expm1f; _ZGVeN16v_expm1f;
+    _ZGVbN4v_log10f; _ZGVcN8v_log10f; _ZGVdN8v_log10f; _ZGVeN16v_log10f;
     _ZGVbN4v_sinhf; _ZGVcN8v_sinhf; _ZGVdN8v_sinhf; _ZGVeN16v_sinhf;
     _ZGVbN4vv_atan2f; _ZGVcN8vv_atan2f; _ZGVdN8vv_atan2f; _ZGVeN16vv_atan2f;
     _ZGVbN4vv_hypotf; _ZGVcN8vv_hypotf; _ZGVdN8vv_hypotf; _ZGVeN16vv_hypotf;
diff --git a/sysdeps/x86_64/fpu/libm-test-ulps b/sysdeps/x86_64/fpu/libm-test-ulps
index 6f59c61756..b0cd9d60ea 100644
--- a/sysdeps/x86_64/fpu/libm-test-ulps
+++ b/sysdeps/x86_64/fpu/libm-test-ulps
@@ -1641,6 +1641,26 @@ float: 2
 float128: 1
 ldouble: 1
 
+Function: "log10_vlen16":
+float: 1
+
+Function: "log10_vlen2":
+double: 1
+
+Function: "log10_vlen4":
+double: 1
+float: 1
+
+Function: "log10_vlen4_avx2":
+double: 1
+
+Function: "log10_vlen8":
+double: 1
+float: 1
+
+Function: "log10_vlen8_avx2":
+float: 1
+
 Function: "log1p":
 double: 1
 float: 1
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core-sse2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core-sse2.S
new file mode 100644
index 0000000000..e654db6d6c
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core-sse2.S
@@ -0,0 +1,20 @@
+/* SSE2 version of vectorized log10, vector length is 2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVbN2v_log10 _ZGVbN2v_log10_sse2
+#include "../svml_d_log102_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core.c
new file mode 100644
index 0000000000..1c775f33b6
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized log10, vector length is 2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_log10
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_log10, __GI__ZGVbN2v_log10, __redirect__ZGVbN2v_log10)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log102_core_sse4.S
new file mode 10