RISC-V: ABI Implementation

This patch contains code that needs to directly know about the RISC-V
ABI, which is specified in a work-in-progress psABI document:

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

This is meant to contain all the RISC-V code that needs to explicitly
name registers or manage in-memory structure layout.  This does not
contain any of the Linux-specific code.

2018-01-29  Palmer Dabbelt  <palmer@sifive.com>

        * sysdeps/riscv/__longjmp.S: New file.
        * sysdeps/riscv/backtrace.c: Likewise.
        * sysdeps/riscv/bits/endian.h: Likewise.
        * sysdeps/riscv/bits/setjmp.h: Likewise.
        * sysdeps/riscv/bits/wordsize.h: Likewise.
        * sysdeps/riscv/bsd-_setjmp.c: Likewise.
        * sysdeps/riscv/bsd-setjmp.c: Likewise.
        * sysdeps/riscv/dl-trampoline.S: Likewise.
        * sysdeps/riscv/gccframe.h: Likewise.
        * sysdeps/riscv/jmpbuf-offsets.h: Likewise.
        * sysdeps/riscv/jmpbuf-unwind.h: Likewise.
        * sysdeps/riscv/machine-gmon.h: Likewise.
        * sysdeps/riscv/memusage.h: Likewise.
        * sysdeps/riscv/setjmp.S: Likewise.
        * sysdeps/riscv/sys/asm.h: Likewise.
        * sysdeps/riscv/tls-macros.h: Likewise.

24 files changed, 1170 insertions, 0 deletions

diff --git a/ChangeLog b/ChangeLog
index ec0cce9c76..a7f4a36332 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -6,6 +6,22 @@
 	* config.h.in: Regenerate.
 	* manual/platform.texi: Add RISC-V documenation for
 	__riscv_flush_icache.
+	* sysdeps/riscv/__longjmp.S: New file.
+	* sysdeps/riscv/backtrace.c: Likewise.
+	* sysdeps/riscv/bits/endian.h: Likewise.
+	* sysdeps/riscv/bits/setjmp.h: Likewise.
+	* sysdeps/riscv/bits/wordsize.h: Likewise.
+	* sysdeps/riscv/bsd-_setjmp.c: Likewise.
+	* sysdeps/riscv/bsd-setjmp.c: Likewise.
+	* sysdeps/riscv/dl-trampoline.S: Likewise.
+	* sysdeps/riscv/gccframe.h: Likewise.
+	* sysdeps/riscv/jmpbuf-offsets.h: Likewise.
+	* sysdeps/riscv/jmpbuf-unwind.h: Likewise.
+	* sysdeps/riscv/machine-gmon.h: Likewise.
+	* sysdeps/riscv/memusage.h: Likewise.
+	* sysdeps/riscv/setjmp.S: Likewise.
+	* sysdeps/riscv/sys/asm.h: Likewise.
+	* sysdeps/riscv/tls-macros.h: Likewise.
 
 2018-01-29  Florian Weimer  <fweimer@redhat.com>
 
diff --git a/sysdeps/riscv/__longjmp.S b/sysdeps/riscv/__longjmp.S
new file mode 100644
index 0000000000..0b9e5e10e2
--- /dev/null
+++ b/sysdeps/riscv/__longjmp.S
@@ -0,0 +1,57 @@
+/* longjmp, RISC-V version.
+   Copyright (C) 1996-2018 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <sys/asm.h>
+
+ENTRY (__longjmp)
+	REG_L ra,  0*SZREG(a0)
+	REG_L s0,  1*SZREG(a0)
+	REG_L s1,  2*SZREG(a0)
+	REG_L s2,  3*SZREG(a0)
+	REG_L s3,  4*SZREG(a0)
+	REG_L s4,  5*SZREG(a0)
+	REG_L s5,  6*SZREG(a0)
+	REG_L s6,  7*SZREG(a0)
+	REG_L s7,  8*SZREG(a0)
+	REG_L s8,  9*SZREG(a0)
+	REG_L s9, 10*SZREG(a0)
+	REG_L s10,11*SZREG(a0)
+	REG_L s11,12*SZREG(a0)
+	REG_L sp, 13*SZREG(a0)
+
+#ifndef __riscv_float_abi_soft
+	FREG_L fs0, 14*SZREG+ 0*SZFREG(a0)
+	FREG_L fs1, 14*SZREG+ 1*SZFREG(a0)
+	FREG_L fs2, 14*SZREG+ 2*SZFREG(a0)
+	FREG_L fs3, 14*SZREG+ 3*SZFREG(a0)
+	FREG_L fs4, 14*SZREG+ 4*SZFREG(a0)
+	FREG_L fs5, 14*SZREG+ 5*SZFREG(a0)
+	FREG_L fs6, 14*SZREG+ 6*SZFREG(a0)
+	FREG_L fs7, 14*SZREG+ 7*SZFREG(a0)
+	FREG_L fs8, 14*SZREG+ 8*SZFREG(a0)
+	FREG_L fs9, 14*SZREG+ 9*SZFREG(a0)
+	FREG_L fs10,14*SZREG+10*SZFREG(a0)
+	FREG_L fs11,14*SZREG+11*SZFREG(a0)
+#endif
+
+	seqz a0, a1
+	add  a0, a0, a1   # a0 = (a1 == 0) ? 1 : a1
+	ret
+
+END (__longjmp)
diff --git a/sysdeps/riscv/backtrace.c b/sysdeps/riscv/backtrace.c
new file mode 100644
index 0000000000..27ce597b39
--- /dev/null
+++ b/sysdeps/riscv/backtrace.c
@@ -0,0 +1 @@
+#include <sysdeps/x86_64/backtrace.c>
diff --git a/sysdeps/riscv/bits/endian.h b/sysdeps/riscv/bits/endian.h
new file mode 100644
index 0000000000..4aaf559d4f
--- /dev/null
+++ b/sysdeps/riscv/bits/endian.h
@@ -0,0 +1,5 @@
+#ifndef _ENDIAN_H
+# error "Never use <bits/endian.h> directly; include <endian.h> instead."
+#endif
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
diff --git a/sysdeps/riscv/bits/link.h b/sysdeps/riscv/bits/link.h
new file mode 100644
index 0000000000..cedc4ad9b2
--- /dev/null
+++ b/sysdeps/riscv/bits/link.h
@@ -0,0 +1,56 @@
+/* Machine-specific declarations for dynamic linker interface.  RISC-V version.
+   Copyright (C) 2005-2018 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef	_LINK_H
+# error "Never include <bits/link.h> directly; use <link.h> instead."
+#endif
+
+typedef struct La_riscv_regs
+{
+  unsigned long int lr_reg[8]; /* a0 - a7 */
+  double lr_fpreg[8]; /* fa0 - fa7 */
+  unsigned long int lr_ra;
+  unsigned long int lr_sp;
+} La_riscv_regs;
+
+/* Return values for calls from PLT on RISC-V.  */
+typedef struct La_riscv_retval
+{
+  unsigned long int lrv_a0;
+  unsigned long int lrv_a1;
+  double lrv_fa0;
+  double lrv_fa1;
+} La_riscv_retval;
+
+__BEGIN_DECLS
+
+extern ElfW(Addr) la_riscv_gnu_pltenter (ElfW(Sym) *__sym, unsigned int __ndx,
+					 uintptr_t *__refcook,
+					 uintptr_t *__defcook,
+					 La_riscv_regs *__regs,
+					 unsigned int *__flags,
+					 const char *__symname,
+					 long int *__framesizep);
+extern unsigned int la_riscv_gnu_pltexit (ElfW(Sym) *__sym, unsigned int __ndx,
+					  uintptr_t *__refcook,
+					  uintptr_t *__defcook,
+					  const La_riscv_regs *__inregs,
+					  La_riscv_retval *__outregs,
+					  const char *__symname);
+
+__END_DECLS
diff --git a/sysdeps/riscv/bits/setjmp.h b/sysdeps/riscv/bits/setjmp.h
new file mode 100644
index 0000000000..988ad6b1d6
--- /dev/null
+++ b/sysdeps/riscv/bits/setjmp.h
@@ -0,0 +1,39 @@
+/* Define the machine-dependent type `jmp_buf'.  RISC-V version.
+   Copyright (C) 2011-2018 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _RISCV_BITS_SETJMP_H
+#define _RISCV_BITS_SETJMP_H
+
+typedef struct __jmp_buf_internal_tag
+  {
+    /* Program counter.  */
+    long int __pc;
+    /* Callee-saved registers.  */
+    long int __regs[12];
+    /* Stack pointer.  */
+    long int __sp;
+
+    /* Callee-saved floating point registers.  */
+#if defined __riscv_float_abi_double
+   double __fpregs[12];
+#elif !defined __riscv_float_abi_soft
+# error unsupported FLEN
+#endif
+  } __jmp_buf[1];
+
+#endif /* _RISCV_BITS_SETJMP_H */
diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h
new file mode 100644
index 0000000000..67a16ba622
--- /dev/null
+++ b/sysdeps/riscv/bits/wordsize.h
@@ -0,0 +1,29 @@
+/* Determine the wordsize from the preprocessor defines.  RISC-V version.
+   Copyright (C) 2002-2018 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#if __riscv_xlen == (__SIZEOF_POINTER__ * 8)
+# define __WORDSIZE __riscv_xlen
+#else
+# error unsupported ABI
+#endif
+
+#if __riscv_xlen == 64
+# define __WORDSIZE_TIME64_COMPAT32 1
+#else
+# error "rv32i-based targets are not supported"
+#endif
diff --git a/sysdeps/riscv/bsd-_setjmp.c b/sysdeps/riscv/bsd-_setjmp.c
new file mode 100644
index 0000000000..0d413101ce
--- /dev/null
+++ b/sysdeps/riscv/bsd-_setjmp.c
@@ -0,0 +1 @@
+/* _setjmp is implemented in setjmp.S */
diff --git a/sysdeps/riscv/bsd-setjmp.c b/sysdeps/riscv/bsd-setjmp.c
new file mode 100644
index 0000000000..ee7c5e3437
--- /dev/null
+++ b/sysdeps/riscv/bsd-setjmp.c
@@ -0,0 +1 @@
+/* setjmp is implemented in setjmp.S */
diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h
new file mode 100644
index 0000000000..9e3c2925f0
--- /dev/null
+++ b/sysdeps/riscv/dl-machine.h
@@ -0,0 +1,323 @@
+/* Machine-dependent ELF dynamic relocation inline functions.  RISC-V version.
+   Copyright (C) 2011-2018 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef dl_machine_h
+#define dl_machine_h
+
+#define ELF_MACHINE_NAME "RISC-V"
+
+#include <entry.h>
+#include <elf/elf.h>
+#include <sys/asm.h>
+#include <dl-tls.h>
+
+#ifndef _RTLD_PROLOGUE
+# define _RTLD_PROLOGUE(entry)						\
+	".globl\t" __STRING (entry) "\n\t"				\
+	".type\t" __STRING (entry) ", @function\n"			\
+	__STRING (entry) ":\n\t"
+#endif
+
+#ifndef _RTLD_EPILOGUE
+# define _RTLD_EPILOGUE(entry)						\
+	".size\t" __STRING (entry) ", . - " __STRING (entry) "\n\t"
+#endif
+
+#define ELF_MACHINE_JMP_SLOT R_RISCV_JUMP_SLOT
+
+#define elf_machine_type_class(type)				\
+  ((ELF_RTYPE_CLASS_PLT * ((type) == ELF_MACHINE_JMP_SLOT	\
+     || (__WORDSIZE == 32 && (type) == R_RISCV_TLS_DTPREL32)	\
+     || (__WORDSIZE == 32 && (type) == R_RISCV_TLS_DTPMOD32)	\
+     || (__WORDSIZE == 32 && (type) == R_RISCV_TLS_TPREL32)	\
+     || (__WORDSIZE == 64 && (type) == R_RISCV_TLS_DTPREL64)	\
+     || (__WORDSIZE == 64 && (type) == R_RISCV_TLS_DTPMOD64)	\
+     || (__WORDSIZE == 64 && (type) == R_RISCV_TLS_TPREL64)))	\
+   | (ELF_RTYPE_CLASS_COPY * ((type) == R_RISCV_COPY)))
+
+#define ELF_MACHINE_NO_REL 1
+#define ELF_MACHINE_NO_RELA 0
+
+/* Return nonzero iff ELF header is compatible with the running host.  */
+static inline int __attribute_used__
+elf_machine_matches_host (const ElfW(Ehdr) *ehdr)
+{
+  /* We can only run RISC-V binaries.  */
+  if (ehdr->e_machine != EM_RISCV)
+    return 0;
+
+  /* Ensure the library's floating-point ABI matches that of the running
+     system.  For now we don't support mixing XLEN, so there's no need (or way)
+     to check it matches.  */
+#ifdef __riscv_float_abi_double
+  if ((ehdr->e_flags & EF_RISCV_FLOAT_ABI) != EF_RISCV_FLOAT_ABI_DOUBLE)
+    return 0;
+#else
+  if ((ehdr->e_flags & EF_RISCV_FLOAT_ABI) != EF_RISCV_FLOAT_ABI_SOFT)
+    return 0;
+#endif
+
+  return 1;
+}
+
+/* Return the link-time address of _DYNAMIC.  */
+static inline ElfW(Addr)
+elf_machine_dynamic (void)
+{
+  extern ElfW(Addr) _GLOBAL_OFFSET_TABLE_ __attribute__ ((visibility ("hidden")));
+  return _GLOBAL_OFFSET_TABLE_;
+}
+
+#define STRINGXP(X) __STRING (X)
+#define STRINGXV(X) STRINGV_ (X)
+#define STRINGV_(...) # __VA_ARGS__
+
+/* Return the run-time load address of the shared object.  */
+static inline ElfW(Addr)
+elf_machine_load_address (void)
+{
+  ElfW(Addr) load_addr;
+  asm ("lla %0, _DYNAMIC" : "=r" (load_addr));
+  return load_addr - elf_machine_dynamic ();
+}
+
+/* Initial entry point code for the dynamic linker.
+   The C function `_dl_start' is the real entry point;
+   its return value is the user program's entry point.  */
+
+#define RTLD_START asm (\
+	".text\n\
+	" _RTLD_PROLOGUE (ENTRY_POINT) "\
+	mv a0, sp\n\
+	jal _dl_start\n\
+	# Stash user entry point in s0.\n\
+	mv s0, a0\n\
+	# See if we were run as a command with the executable file\n\
+	# name as an extra leading argument.\n\
+	lw a0, _dl_skip_args\n\
+	# Load the original argument count.\n\
+	" STRINGXP (REG_L) " a1, 0(sp)\n\
+	# Subtract _dl_skip_args from it.\n\
+	sub a1, a1, a0\n\
+	# Adjust the stack pointer to skip _dl_skip_args words.\n\
+	sll a0, a0, " STRINGXP (PTRLOG) "\n\
+	add sp, sp, a0\n\
+	# Save back the modified argument count.\n\
+	" STRINGXP (REG_S) " a1, 0(sp)\n\
+	# Call _dl_init (struct link_map *main_map, int argc, char **argv, char **env) \n\
+	" STRINGXP (REG_L) " a0, _rtld_local\n\
+	add a2, sp, " STRINGXP (SZREG) "\n\
+	sll a3, a1, " STRINGXP (PTRLOG) "\n\
+	add a3, a3, a2\n\
+	add a3, a3, " STRINGXP (SZREG) "\n\
+	# Call the function to run the initializers.\n\
+	jal _dl_init\n\
+	# Pass our finalizer function to _start.\n\
+	lla a0, _dl_fini\n\
+	# Jump to the user entry point.\n\
+	jr s0\n\
+	" _RTLD_EPILOGUE (ENTRY_POINT) "\
+	.previous" \
+);
+
+/* Names of the architecture-specific auditing callback functions.  */
+#define ARCH_LA_PLTENTER riscv_gnu_pltenter
+#define ARCH_LA_PLTEXIT riscv_gnu_pltexit
+
+/* Bias .got.plt entry by the offset requested by the PLT header.  */
+#define elf_machine_plt_value(map, reloc, value) (value)
+
+static inline ElfW(Addr)
+elf_machine_fixup_plt (struct link_map *map, lookup_t t,
+		       const ElfW(Sym) *refsym, const ElfW(Sym) *sym,
+		       const ElfW(Rela) *reloc,
+		       ElfW(Addr) *reloc_addr, ElfW(Addr) value)
+{
+  return *reloc_addr = value;
+}
+
+#endif /* !dl_machine_h */
+
+#ifdef RESOLVE_MAP
+
+/* Perform a relocation described by R_INFO at the location pointed to
+   by RELOC_ADDR.  SYM is the relocation symbol specified by R_INFO and
+   MAP is the object containing the reloc.  */
+
+auto inline void
+__attribute__ ((always_inline))
+elf_machine_rela (struct link_map *map, const ElfW(Rela) *reloc,
+		  const ElfW(Sym) *sym, const struct r_found_version *version,
+		  void *const reloc_addr, int skip_ifunc)
+{
+  ElfW(Addr) r_info = reloc->r_info;
+  const unsigned long int r_type = ELFW (R_TYPE) (r_info);
+  ElfW(Addr) *addr_field = (ElfW(Addr) *) reloc_addr;
+  const ElfW(Sym) *const __attribute__ ((unused)) refsym = sym;
+  struct link_map *sym_map = RESOLVE_MAP (&sym, version, r_type);
+  ElfW(Addr) value = 0;
+  if (sym_map != NULL)
+    value = sym_map->l_addr + sym->st_value + reloc->r_addend;
+
+  switch (r_type)
+    {
+#ifndef RTLD_BOOTSTRAP
+    case __WORDSIZE == 64 ? R_RISCV_TLS_DTPMOD64 : R_RISCV_TLS_DTPMOD32:
+      if (sym_map)
+	*addr_field = sym_map->l_tls_modid;
+      break;
+
+    case __WORDSIZE == 64 ? R_RISCV_TLS_DTPREL64 : R_RISCV_TLS_DTPREL32:
+      if (sym != NULL)
+	*addr_field = TLS_DTPREL_VALUE (sym) + reloc->r_addend;
+      break;
+
+    case __WORDSIZE == 64 ? R_RISCV_TLS_TPREL64 : R_RISCV_TLS_TPREL32:
+      if (sym != NULL)
+	{
+	  CHECK_STATIC_TLS (map, sym_map);
+	  *addr_field = TLS_TPREL_VALUE (sym_map, sym) + reloc->r_addend;
+	}
+      break;
+
+    case R_RISCV_COPY:
+      {
+	if (__glibc_unlikely (sym == NULL))
+	  /* This can happen in trace mode if an object could not be
+	     found.  */
+	  break;
+
+	/* Handle TLS copy relocations.  */
+	if (__glibc_unlikely (ELFW (ST_TYPE) (sym->st_info) == STT_TLS))
+	  {
+	    /* There's nothing to do if the symbol is in .tbss.  */
+	    if (__glibc_likely (sym->st_value >= sym_map->l_tls_initimage_size))
+	      break;
+	    value += (ElfW(Addr)) sym_map->l_tls_initimage - sym_map->l_addr;
+	  }
+
+	size_t size = sym->st_size;
+	if (__glibc_unlikely (sym->st_size != refsym->st_size))
+	  {
+	    const char *strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
+	    if (sym->st_size > refsym->st_size)
+	      size = refsym->st_size;
+	    if (sym->st_size > refsym->st_size || GLRO(dl_verbose))
+	      _dl_error_printf ("\
+  %s: Symbol `%s' has different size in shared object, consider re-linking\n",
+				rtld_progname ?: "<program name unknown>",
+				strtab + refsym->st_name);
+	  }
+
+	memcpy (reloc_addr, (void *)value, size);
+	break;
+      }
+#endif
+
+#if !defined RTLD_BOOTSTRAP || !defined HAVE_Z_COMBRELOC
+    case R_RISCV_RELATIVE:
+      {
+# if !defined RTLD_BOOTSTRAP && !defined HAVE_Z_COMBRELOC
+	/* This is defined in rtld.c, but nowhere in the static libc.a;