x86-64: Add vector asinh/asinhf implementation to libmvec

Implement vectorized asinh/asinhf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector asinh/asinhf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>

50 files changed, 5784 insertions, 1 deletions

diff --git a/bits/libm-simd-decl-stubs.h b/bits/libm-simd-decl-stubs.h
index 21f1a43232..bcaddb7a0e 100644
--- a/bits/libm-simd-decl-stubs.h
+++ b/bits/libm-simd-decl-stubs.h
@@ -296,4 +296,15 @@
 #define __DECL_SIMD_tanhf32x
 #define __DECL_SIMD_tanhf64x
 #define __DECL_SIMD_tanhf128x
+
+#define __DECL_SIMD_asinh
+#define __DECL_SIMD_asinhf
+#define __DECL_SIMD_asinhl
+#define __DECL_SIMD_asinhf16
+#define __DECL_SIMD_asinhf32
+#define __DECL_SIMD_asinhf64
+#define __DECL_SIMD_asinhf128
+#define __DECL_SIMD_asinhf32x
+#define __DECL_SIMD_asinhf64x
+#define __DECL_SIMD_asinhf128x
 #endif
diff --git a/math/bits/mathcalls.h b/math/bits/mathcalls.h
index 3d1c2056d5..40e055e579 100644
--- a/math/bits/mathcalls.h
+++ b/math/bits/mathcalls.h
@@ -84,7 +84,7 @@ __MATHDECL_VEC (void,sincos,,
 /* Hyperbolic arc cosine of X.  */
 __MATHCALL_VEC (acosh,, (_Mdouble_ __x));
 /* Hyperbolic arc sine of X.  */
-__MATHCALL (asinh,, (_Mdouble_ __x));
+__MATHCALL_VEC (asinh,, (_Mdouble_ __x));
 /* Hyperbolic arc tangent of X.  */
 __MATHCALL_VEC (atanh,, (_Mdouble_ __x));
 #endif
diff --git a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
index e178cef683..df265d6a12 100644
--- a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
+++ b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
@@ -49,6 +49,7 @@ GLIBC_2.22 _ZGVeN8vvv_sincos F
 GLIBC_2.35 _ZGVbN2v_acos F
 GLIBC_2.35 _ZGVbN2v_acosh F
 GLIBC_2.35 _ZGVbN2v_asin F
+GLIBC_2.35 _ZGVbN2v_asinh F
 GLIBC_2.35 _ZGVbN2v_atan F
 GLIBC_2.35 _ZGVbN2v_atanh F
 GLIBC_2.35 _ZGVbN2v_cbrt F
@@ -67,6 +68,7 @@ GLIBC_2.35 _ZGVbN2vv_hypot F
 GLIBC_2.35 _ZGVbN4v_acosf F
 GLIBC_2.35 _ZGVbN4v_acoshf F
 GLIBC_2.35 _ZGVbN4v_asinf F
+GLIBC_2.35 _ZGVbN4v_asinhf F
 GLIBC_2.35 _ZGVbN4v_atanf F
 GLIBC_2.35 _ZGVbN4v_atanhf F
 GLIBC_2.35 _ZGVbN4v_cbrtf F
@@ -85,6 +87,7 @@ GLIBC_2.35 _ZGVbN4vv_hypotf F
 GLIBC_2.35 _ZGVcN4v_acos F
 GLIBC_2.35 _ZGVcN4v_acosh F
 GLIBC_2.35 _ZGVcN4v_asin F
+GLIBC_2.35 _ZGVcN4v_asinh F
 GLIBC_2.35 _ZGVcN4v_atan F
 GLIBC_2.35 _ZGVcN4v_atanh F
 GLIBC_2.35 _ZGVcN4v_cbrt F
@@ -103,6 +106,7 @@ GLIBC_2.35 _ZGVcN4vv_hypot F
 GLIBC_2.35 _ZGVcN8v_acosf F
 GLIBC_2.35 _ZGVcN8v_acoshf F
 GLIBC_2.35 _ZGVcN8v_asinf F
+GLIBC_2.35 _ZGVcN8v_asinhf F
 GLIBC_2.35 _ZGVcN8v_atanf F
 GLIBC_2.35 _ZGVcN8v_atanhf F
 GLIBC_2.35 _ZGVcN8v_cbrtf F
@@ -121,6 +125,7 @@ GLIBC_2.35 _ZGVcN8vv_hypotf F
 GLIBC_2.35 _ZGVdN4v_acos F
 GLIBC_2.35 _ZGVdN4v_acosh F
 GLIBC_2.35 _ZGVdN4v_asin F
+GLIBC_2.35 _ZGVdN4v_asinh F
 GLIBC_2.35 _ZGVdN4v_atan F
 GLIBC_2.35 _ZGVdN4v_atanh F
 GLIBC_2.35 _ZGVdN4v_cbrt F
@@ -139,6 +144,7 @@ GLIBC_2.35 _ZGVdN4vv_hypot F
 GLIBC_2.35 _ZGVdN8v_acosf F
 GLIBC_2.35 _ZGVdN8v_acoshf F
 GLIBC_2.35 _ZGVdN8v_asinf F
+GLIBC_2.35 _ZGVdN8v_asinhf F
 GLIBC_2.35 _ZGVdN8v_atanf F
 GLIBC_2.35 _ZGVdN8v_atanhf F
 GLIBC_2.35 _ZGVdN8v_cbrtf F
@@ -157,6 +163,7 @@ GLIBC_2.35 _ZGVdN8vv_hypotf F
 GLIBC_2.35 _ZGVeN16v_acosf F
 GLIBC_2.35 _ZGVeN16v_acoshf F
 GLIBC_2.35 _ZGVeN16v_asinf F
+GLIBC_2.35 _ZGVeN16v_asinhf F
 GLIBC_2.35 _ZGVeN16v_atanf F
 GLIBC_2.35 _ZGVeN16v_atanhf F
 GLIBC_2.35 _ZGVeN16v_cbrtf F
@@ -175,6 +182,7 @@ GLIBC_2.35 _ZGVeN16vv_hypotf F
 GLIBC_2.35 _ZGVeN8v_acos F
 GLIBC_2.35 _ZGVeN8v_acosh F
 GLIBC_2.35 _ZGVeN8v_asin F
+GLIBC_2.35 _ZGVeN8v_asinh F
 GLIBC_2.35 _ZGVeN8v_atan F
 GLIBC_2.35 _ZGVeN8v_atanh F
 GLIBC_2.35 _ZGVeN8v_cbrt F
diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h
index 3c657f6108..71b7d660db 100644
--- a/sysdeps/x86/fpu/bits/math-vector.h
+++ b/sysdeps/x86/fpu/bits/math-vector.h
@@ -130,6 +130,10 @@
 #  define __DECL_SIMD_tanh __DECL_SIMD_x86_64
 #  undef __DECL_SIMD_tanhf
 #  define __DECL_SIMD_tanhf __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_asinh
+#  define __DECL_SIMD_asinh __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_asinhf
+#  define __DECL_SIMD_asinhf __DECL_SIMD_x86_64
 
 # endif
 #endif
diff --git a/sysdeps/x86/fpu/finclude/math-vector-fortran.h b/sysdeps/x86/fpu/finclude/math-vector-fortran.h
index c7f81945fe..4d3afdf753 100644
--- a/sysdeps/x86/fpu/finclude/math-vector-fortran.h
+++ b/sysdeps/x86/fpu/finclude/math-vector-fortran.h
@@ -64,6 +64,8 @@
 !GCC$ builtin (erff) attributes simd (notinbranch) if('x86_64')
 !GCC$ builtin (tanh) attributes simd (notinbranch) if('x86_64')
 !GCC$ builtin (tanhf) attributes simd (notinbranch) if('x86_64')
+!GCC$ builtin (asinh) attributes simd (notinbranch) if('x86_64')
+!GCC$ builtin (asinhf) attributes simd (notinbranch) if('x86_64')
 
 !GCC$ builtin (cos) attributes simd (notinbranch) if('x32')
 !GCC$ builtin (cosf) attributes simd (notinbranch) if('x32')
@@ -113,3 +115,5 @@
 !GCC$ builtin (erff) attributes simd (notinbranch) if('x32')
 !GCC$ builtin (tanh) attributes simd (notinbranch) if('x32')
 !GCC$ builtin (tanhf) attributes simd (notinbranch) if('x32')
+!GCC$ builtin (asinh) attributes simd (notinbranch) if('x32')
+!GCC$ builtin (asinhf) attributes simd (notinbranch) if('x32')
diff --git a/sysdeps/x86_64/fpu/Makeconfig b/sysdeps/x86_64/fpu/Makeconfig
index 26df8d47bf..2ff33c7dd8 100644
--- a/sysdeps/x86_64/fpu/Makeconfig
+++ b/sysdeps/x86_64/fpu/Makeconfig
@@ -25,6 +25,7 @@ libmvec-funcs = \
   acos \
   acosh \
   asin \
+  asinh \
   atan \
   atan2 \
   atanh \
diff --git a/sysdeps/x86_64/fpu/Versions b/sysdeps/x86_64/fpu/Versions
index adcbe0fefb..e6ead13085 100644
--- a/sysdeps/x86_64/fpu/Versions
+++ b/sysdeps/x86_64/fpu/Versions
@@ -17,6 +17,7 @@ libmvec {
     _ZGVbN2v_acos; _ZGVcN4v_acos; _ZGVdN4v_acos; _ZGVeN8v_acos;
     _ZGVbN2v_acosh; _ZGVcN4v_acosh; _ZGVdN4v_acosh; _ZGVeN8v_acosh;
     _ZGVbN2v_asin; _ZGVcN4v_asin; _ZGVdN4v_asin; _ZGVeN8v_asin;
+    _ZGVbN2v_asinh; _ZGVcN4v_asinh; _ZGVdN4v_asinh; _ZGVeN8v_asinh;
     _ZGVbN2v_atan; _ZGVcN4v_atan; _ZGVdN4v_atan; _ZGVeN8v_atan;
     _ZGVbN2v_atanh; _ZGVcN4v_atanh; _ZGVdN4v_atanh; _ZGVeN8v_atanh;
     _ZGVbN2v_cbrt; _ZGVcN4v_cbrt; _ZGVdN4v_cbrt; _ZGVeN8v_cbrt;
@@ -35,6 +36,7 @@ libmvec {
     _ZGVbN4v_acosf; _ZGVcN8v_acosf; _ZGVdN8v_acosf; _ZGVeN16v_acosf;
     _ZGVbN4v_acoshf; _ZGVcN8v_acoshf; _ZGVdN8v_acoshf; _ZGVeN16v_acoshf;
     _ZGVbN4v_asinf; _ZGVcN8v_asinf; _ZGVdN8v_asinf; _ZGVeN16v_asinf;
+    _ZGVbN4v_asinhf; _ZGVcN8v_asinhf; _ZGVdN8v_asinhf; _ZGVeN16v_asinhf;
     _ZGVbN4v_atanf; _ZGVcN8v_atanf; _ZGVdN8v_atanf; _ZGVeN16v_atanf;
     _ZGVbN4v_atanhf; _ZGVcN8v_atanhf; _ZGVdN8v_atanhf; _ZGVeN16v_atanhf;
     _ZGVbN4v_cbrtf; _ZGVcN8v_cbrtf; _ZGVdN8v_cbrtf; _ZGVeN16v_cbrtf;
diff --git a/sysdeps/x86_64/fpu/libm-test-ulps b/sysdeps/x86_64/fpu/libm-test-ulps
index bfaad7acef..71e9fced02 100644
--- a/sysdeps/x86_64/fpu/libm-test-ulps
+++ b/sysdeps/x86_64/fpu/libm-test-ulps
@@ -157,6 +157,23 @@ float: 3
 float128: 4
 ldouble: 5
 
+Function: "asinh_vlen2":
+double: 1
+
+Function: "asinh_vlen4":
+double: 1
+float: 1
+
+Function: "asinh_vlen4_avx2":
+double: 1
+
+Function: "asinh_vlen8":
+double: 1
+float: 1
+
+Function: "asinh_vlen8_avx2":
+float: 1
+
 Function: "atan":
 double: 1
 float: 1
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core-sse2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core-sse2.S
new file mode 100644
index 0000000000..ddd1c3ca24
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core-sse2.S
@@ -0,0 +1,20 @@
+/* SSE2 version of vectorized asinh, vector length is 2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define _ZGVbN2v_asinh _ZGVbN2v_asinh_sse2
+#include "../svml_d_asinh2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core.c
new file mode 100644
index 0000000000..37452d0f92
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized asinh, vector length is 2.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#define SYMBOL_NAME _ZGVbN2v_asinh
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_asinh, __GI__ZGVbN2v_asinh, __redirect__ZGVbN2v_asinh)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_d_asinh2_core_sse4.S
new file mode 100644
index 0000000000..0fe130f20a
--- /dev/null
+++ b/