diff options
| author | H.J. Lu <hjl.tools@gmail.com> | 2020-10-09 06:06:56 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2021-01-07 13:10:13 -0800 |
| commit | ecce11aa0752735c4fd730da6e7c9e0b98e12fb8 (patch) | |
| tree | 985a02d3524d901f746cf085e2b68e34cde776aa | |
| parent | 9e97f239eae1f2b1d2e694d844c0f6fd7c4dd271 (diff) | |
| download | glibc-ecce11aa0752735c4fd730da6e7c9e0b98e12fb8.tar.xz glibc-ecce11aa0752735c4fd730da6e7c9e0b98e12fb8.zip | |
x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717]
GCC 11 supports -march=x86-64-v[234] to enable x86 micro-architecture ISA
levels:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97250
and -mneeded to emit GNU_PROPERTY_X86_ISA_1_NEEDED property with
GNU_PROPERTY_X86_ISA_1_V[234] marker:
https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13
Binutils support for GNU_PROPERTY_X86_ISA_1_V[234] marker were added by
commit b0ab06937385e0ae25cebf1991787d64f439bf12
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Oct 30 06:49:57 2020 -0700
x86: Support GNU_PROPERTY_X86_ISA_1_BASELINE marker
and
commit 32930e4edbc06bc6f10c435dbcc63131715df678
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Oct 9 05:05:57 2020 -0700
x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker
GNU_PROPERTY_X86_ISA_1_NEEDED property in x86 ELF binaries indicate the
micro-architecture ISA level required to execute the binary. The marker
must be added by programmers explicitly in one of 3 ways:
1. Pass -mneeded to GCC.
2. Add the marker in the linker inputs as this patch does.
3. Pass -z x86-64-v[234] to the linker.
Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
marker support to ld.so if binutils 2.32 or newer is used to build glibc:
1. Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
markers to elf.h.
2. Add GNU_PROPERTY_X86_ISA_1_BASELINE and GNU_PROPERTY_X86_ISA_1_V[234]
marker to abi-note.o based on the ISA level used to compile abi-note.o,
assuming that the same ISA level is used to compile the whole glibc.
3. Add isa_1 to cpu_features to record the supported x86 ISA level.
4. Rename _dl_process_cet_property_note to _dl_process_property_note and
add GNU_PROPERTY_X86_ISA_1_V[234] marker detection.
5. Update _rtld_main_check and _dl_open_check to check loaded objects
with the incompatible ISA level.
6. Add a testcase to verify that dlopen an x86-64-v4 shared object fails
on lesser platforms.
7. Use <get-isa-level.h> in dl-hwcaps-subdirs.c and tst-glibc-hwcaps.c.
Tested under i686, x32 and x86-64 modes on x86-64-v2, x86-64-v3 and
x86-64-v4 machines.
Marked elf/tst-isa-level-1 with x86-64-v4, ran it on x86-64-v3 machine
and got:
[hjl@gnu-cfl-2 build-x86_64-linux]$ ./elf/tst-isa-level-1
./elf/tst-isa-level-1: CPU ISA level is lower than required
[hjl@gnu-cfl-2 build-x86_64-linux]$
| -rw-r--r-- | config.h.in | 3 | ||||
| -rw-r--r-- | elf/elf.h | 35 | ||||
| -rw-r--r-- | sysdeps/x86/Makefile | 30 | ||||
| -rw-r--r-- | sysdeps/x86/abi-note.c | 29 | ||||
| -rw-r--r-- | sysdeps/x86/configure | 79 | ||||
| -rw-r--r-- | sysdeps/x86/configure.ac | 66 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 3 | ||||
| -rw-r--r-- | sysdeps/x86/dl-cet.c | 12 | ||||
| -rw-r--r-- | sysdeps/x86/dl-prop.h | 113 | ||||
| -rw-r--r-- | sysdeps/x86/get-isa-level.h | 66 | ||||
| -rw-r--r-- | sysdeps/x86/include/cpu-features.h | 2 | ||||
| -rw-r--r-- | sysdeps/x86/isa-level.c | 97 | ||||
| -rw-r--r-- | sysdeps/x86/link_map.h | 18 | ||||
| -rw-r--r-- | sysdeps/x86/tst-isa-level-1.c | 104 | ||||
| -rw-r--r-- | sysdeps/x86/tst-isa-level-mod-1-baseline.c | 1 | ||||
| -rw-r--r-- | sysdeps/x86/tst-isa-level-mod-1-v2.c | 1 | ||||
| -rw-r--r-- | sysdeps/x86/tst-isa-level-mod-1-v3.c | 1 | ||||
| -rw-r--r-- | sysdeps/x86/tst-isa-level-mod-1-v4.c | 1 | ||||
| -rw-r--r-- | sysdeps/x86/tst-isa-level-mod-1.c | 25 | ||||
| -rw-r--r-- | sysdeps/x86_64/dl-hwcaps-subdirs.c | 30 | ||||
| -rw-r--r-- | sysdeps/x86_64/tst-glibc-hwcaps.c | 41 |
21 files changed, 644 insertions, 113 deletions
diff --git a/config.h.in b/config.h.in index eca2d66a2c..947feeff36 100644 --- a/config.h.in +++ b/config.h.in @@ -269,4 +269,7 @@ /* The default value of x86 CET control. */ #define DEFAULT_DL_X86_CET_CONTROL cet_elf_property +/* Define if x86 ISA level should be included in shared libraries. */ +#undef INCLUDE_X86_ISA_LEVEL + #endif @@ -1324,31 +1324,26 @@ typedef struct /* The x86 instruction sets indicated by the corresponding bits are used in program. Their support in the hardware is optional. */ -#define GNU_PROPERTY_X86_ISA_1_USED 0xc0000000 +#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002 /* The x86 instruction sets indicated by the corresponding bits are used in program and they must be supported by the hardware. */ -#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0000001 +#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002 /* X86 processor-specific features used in program. */ #define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002 -#define GNU_PROPERTY_X86_ISA_1_486 (1U << 0) -#define GNU_PROPERTY_X86_ISA_1_586 (1U << 1) -#define GNU_PROPERTY_X86_ISA_1_686 (1U << 2) -#define GNU_PROPERTY_X86_ISA_1_SSE (1U << 3) -#define GNU_PROPERTY_X86_ISA_1_SSE2 (1U << 4) -#define GNU_PROPERTY_X86_ISA_1_SSE3 (1U << 5) -#define GNU_PROPERTY_X86_ISA_1_SSSE3 (1U << 6) -#define GNU_PROPERTY_X86_ISA_1_SSE4_1 (1U << 7) -#define GNU_PROPERTY_X86_ISA_1_SSE4_2 (1U << 8) -#define GNU_PROPERTY_X86_ISA_1_AVX (1U << 9) -#define GNU_PROPERTY_X86_ISA_1_AVX2 (1U << 10) -#define GNU_PROPERTY_X86_ISA_1_AVX512F (1U << 11) -#define GNU_PROPERTY_X86_ISA_1_AVX512CD (1U << 12) -#define GNU_PROPERTY_X86_ISA_1_AVX512ER (1U << 13) -#define GNU_PROPERTY_X86_ISA_1_AVX512PF (1U << 14) -#define GNU_PROPERTY_X86_ISA_1_AVX512VL (1U << 15) -#define GNU_PROPERTY_X86_ISA_1_AVX512DQ (1U << 16) -#define GNU_PROPERTY_X86_ISA_1_AVX512BW (1U << 17) +/* GNU_PROPERTY_X86_ISA_1_BASELINE: CMOV, CX8 (cmpxchg8b), FPU (fld), + MMX, OSFXSR (fxsave), SCE (syscall), SSE and SSE2. */ +#define GNU_PROPERTY_X86_ISA_1_BASELINE (1U << 0) +/* GNU_PROPERTY_X86_ISA_1_V2: GNU_PROPERTY_X86_ISA_1_BASELINE, + CMPXCHG16B (cmpxchg16b), LAHF-SAHF (lahf), POPCNT (popcnt), SSE3, + SSSE3, SSE4.1 and SSE4.2. */ +#define GNU_PROPERTY_X86_ISA_1_V2 (1U << 1) +/* GNU_PROPERTY_X86_ISA_1_V3: GNU_PROPERTY_X86_ISA_1_V2, AVX, AVX2, BMI1, + BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE. */ +#define GNU_PROPERTY_X86_ISA_1_V3 (1U << 2) +/* GNU_PROPERTY_X86_ISA_1_V4: GNU_PROPERTY_X86_ISA_1_V3, AVX512F, + AVX512BW, AVX512CD, AVX512DQ and AVX512VL. */ +#define GNU_PROPERTY_X86_ISA_1_V4 (1U << 3) /* This indicates that all executable sections are compatible with IBT. */ diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 081cc72e93..c814d5a195 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -9,6 +9,36 @@ sysdep_headers += sys/platform/x86.h tests += tst-get-cpu-features tst-get-cpu-features-static \ tst-cpu-features-cpuinfo tst-cpu-features-supports tests-static += tst-get-cpu-features-static +ifeq (yes,$(enable-x86-isa-level)) +tests += tst-isa-level-1 +modules-names += tst-isa-level-mod-1-baseline \ + tst-isa-level-mod-1-v2 \ + tst-isa-level-mod-1-v3 \ + tst-isa-level-mod-1-v4 \ + +# X86 ISA level baseline +CFLAGS-tst-isa-level-mod-1-baseline.c += -DINCLUDE_X86_ISA_LEVEL \ + -DISA_LEVEL=0x1 \ + -march=x86-64 +# X86 ISA level v2 +CFLAGS-tst-isa-level-mod-1-v2.c += -DINCLUDE_X86_ISA_LEVEL \ + -DISA_LEVEL=0x3 \ + -march=x86-64 +# X86 ISA level v3 +CFLAGS-tst-isa-level-mod-1-v3.c += -DINCLUDE_X86_ISA_LEVEL \ + -DISA_LEVEL=0x7 \ + -march=x86-64 +# X86 ISA level v4 +CFLAGS-tst-isa-level-mod-1-v4.c += -DINCLUDE_X86_ISA_LEVEL \ + -DISA_LEVEL=0xf \ + -march=x86-64 + +$(objpfx)tst-isa-level-1: $(libdl) +$(objpfx)tst-isa-level-1.out: $(objpfx)tst-isa-level-mod-1-baseline.so \ + $(objpfx)tst-isa-level-mod-1-v2.so \ + $(objpfx)tst-isa-level-mod-1-v3.so \ + $(objpfx)tst-isa-level-mod-1-v4.so +endif endif ifeq ($(subdir),math) diff --git a/sysdeps/x86/abi-note.c b/sysdeps/x86/abi-note.c new file mode 100644 index 0000000000..5140e6ab47 --- /dev/null +++ b/sysdeps/x86/abi-note.c @@ -0,0 +1,29 @@ +/* Special .init and .fini section support. x86-64 version. + Copyright (C) 2020 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file with other + programs, and to distribute those programs without any restriction + coming from the use of this file. (The Lesser General Public + License restrictions do apply in other respects; for example, they + cover modification of the file, and distribution when not linked + into another program.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. */ + +#include <isa-level.c> +#include <csu/abi-note.c> diff --git a/sysdeps/x86/configure b/sysdeps/x86/configure index 81cc4e80d6..5e32dc62b3 100644 --- a/sysdeps/x86/configure +++ b/sysdeps/x86/configure @@ -68,3 +68,82 @@ elif test $enable_cet = permissive; then fi config_vars="$config_vars enable-cet = $enable_cet" + +# Check if linker supports x86 ISA level. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for linker x86 ISA level support" >&5 +$as_echo_n "checking for linker x86 ISA level support... " >&6; } +if ${libc_cv_include_x86_isa_level+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat > conftest1.S <<EOF +#ifdef __LP64__ +# define P2ALIGN 3 +#else +# define P2ALIGN 2 +#endif + .section ".note.gnu.property", "a" + .p2align P2ALIGN + .long 1f - 0f /* name length. */ + .long 4f - 1f /* data length. */ + /* NT_GNU_PROPERTY_TYPE_0 */ + .long 5 /* note type. */ +0: + .asciz "GNU" /* vendor name. */ +1: + .p2align P2ALIGN + /* GNU_PROPERTY_X86_ISA_1_NEEDED */ + .long 0xc0008002 /* pr_type. */ + .long 3f - 2f /* pr_datasz. */ +2: + .long 0x1 +3: + .p2align P2ALIGN +4: +EOF +cat > conftest2.S <<EOF +#ifdef __LP64__ +# define P2ALIGN 3 +#else +# define P2ALIGN 2 +#endif + .section ".note.gnu.property", "a" + .p2align P2ALIGN + .long 1f - 0f /* name length. */ + .long 4f - 1f /* data length. */ + /* NT_GNU_PROPERTY_TYPE_0 */ + .long 5 /* note type. */ +0: + .asciz "GNU" /* vendor name. */ +1: + .p2align P2ALIGN + /* GNU_PROPERTY_X86_ISA_1_NEEDED */ + .long 0xc0008002 /* pr_type. */ + .long 3f - 2f /* pr_datasz. */ +2: + .long 0x2 +3: + .p2align P2ALIGN +4: +EOF +libc_cv_include_x86_isa_level=no +if { ac_try='${CC-cc} $CFLAGS $CPPFLAGS -nostartfiles -nostdlib -r -o conftest conftest1.S conftest2.S' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then + count=`LC_ALL=C $READELF -n conftest | grep NT_GNU_PROPERTY_TYPE_0 | wc -l` + if test "$count" = 1; then + libc_cv_include_x86_isa_level=yes + fi +fi +rm -f conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_include_x86_isa_level" >&5 +$as_echo "$libc_cv_include_x86_isa_level" >&6; } +if test $libc_cv_include_x86_isa_level = yes; then + $as_echo "#define INCLUDE_X86_ISA_LEVEL 1" >>confdefs.h + +fi +config_vars="$config_vars +enable-x86-isa-level = $libc_cv_include_x86_isa_level" diff --git a/sysdeps/x86/configure.ac b/sysdeps/x86/configure.ac index 8f3e1191f6..f94088f377 100644 --- a/sysdeps/x86/configure.ac +++ b/sysdeps/x86/configure.ac @@ -43,3 +43,69 @@ elif test $enable_cet = permissive; then AC_DEFINE(DEFAULT_DL_X86_CET_CONTROL, cet_permissive) fi LIBC_CONFIG_VAR([enable-cet], [$enable_cet]) + +# Check if linker supports x86 ISA level. +AC_CACHE_CHECK([for linker x86 ISA level support], + libc_cv_include_x86_isa_level, [dnl +cat > conftest1.S <<EOF +#ifdef __LP64__ +# define P2ALIGN 3 +#else +# define P2ALIGN 2 +#endif + .section ".note.gnu.property", "a" + .p2align P2ALIGN + .long 1f - 0f /* name length. */ + .long 4f - 1f /* data length. */ + /* NT_GNU_PROPERTY_TYPE_0 */ + .long 5 /* note type. */ +0: + .asciz "GNU" /* vendor name. */ +1: + .p2align P2ALIGN + /* GNU_PROPERTY_X86_ISA_1_NEEDED */ + .long 0xc0008002 /* pr_type. */ + .long 3f - 2f /* pr_datasz. */ +2: + .long 0x1 +3: + .p2align P2ALIGN +4: +EOF +cat > conftest2.S <<EOF +#ifdef __LP64__ +# define P2ALIGN 3 +#else +# define P2ALIGN 2 +#endif + .section ".note.gnu.property", "a" + .p2align P2ALIGN + .long 1f - 0f /* name length. */ + .long 4f - 1f /* data length. */ + /* NT_GNU_PROPERTY_TYPE_0 */ + .long 5 /* note type. */ +0: + .asciz "GNU" /* vendor name. */ +1: + .p2align P2ALIGN + /* GNU_PROPERTY_X86_ISA_1_NEEDED */ + .long 0xc0008002 /* pr_type. */ + .long 3f - 2f /* pr_datasz. */ +2: + .long 0x2 +3: + .p2align P2ALIGN +4: +EOF +libc_cv_include_x86_isa_level=no +if AC_TRY_COMMAND(${CC-cc} $CFLAGS $CPPFLAGS -nostartfiles -nostdlib -r -o conftest conftest1.S conftest2.S); then + count=`LC_ALL=C $READELF -n conftest | grep NT_GNU_PROPERTY_TYPE_0 | wc -l` + if test "$count" = 1; then + libc_cv_include_x86_isa_level=yes + fi +fi +rm -f conftest*]) +if test $libc_cv_include_x86_isa_level = yes; then + AC_DEFINE(INCLUDE_X86_ISA_LEVEL) +fi +LIBC_CONFIG_VAR([enable-x86-isa-level], [$libc_cv_include_x86_isa_level]) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 529c586193..e7da682a2e 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -19,6 +19,7 @@ #include <cpuid.h> #include <dl-hwcap.h> #include <libc-pointer-arith.h> +#include <get-isa-level.h> #if IS_IN (libc) && !defined SHARED # include <assert.h> # include <unistd.h> @@ -290,6 +291,8 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, KL); CPU_FEATURE_SET_USABLE (cpu_features, WIDE_KL); } + + cpu_features->isa_1 = get_isa_level (cpu_features); } static void diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index b4910f7634..ed7fd6d10d 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -76,10 +76,12 @@ dl_cet_check (struct link_map *m, const char *program) */ enable_ibt &= (HAS_CPU_FEATURE (IBT) && (enable_ibt_type == cet_always_on - || (m->l_cet & lc_ibt) != 0)); + || (m->l_x86_feature_1_and + & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0)); enable_shstk &= (HAS_CPU_FEATURE (SHSTK) && (enable_shstk_type == cet_always_on - || (m->l_cet & lc_shstk) != 0)); + || (m->l_x86_feature_1_and + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0)); } /* ld.so is CET-enabled by kernel. But shared objects may not @@ -111,7 +113,8 @@ dl_cet_check (struct link_map *m, const char *program) /* IBT is enabled only if it is enabled in executable as well as all shared objects. */ enable_ibt &= (enable_ibt_type == cet_always_on - || (l->l_cet & lc_ibt) != 0); + || (l->l_x86_feature_1_and + & GNU_PROPERTY_X86_FEATURE_1_IBT) != 0); if (!found_ibt_legacy && enable_ibt != ibt_enabled) { found_ibt_legacy = true; @@ -121,7 +124,8 @@ dl_cet_check (struct link_map *m, const char *program) /* SHSTK is enabled only if it is enabled in executable as well as all shared objects. */ enable_shstk &= (enable_shstk_type == cet_always_on - || (l->l_cet & lc_shstk) != 0); + || (l->l_x86_feature_1_and + & GNU_PROPERTY_X86_FEATURE_1_SHSTK) != 0); if (enable_shstk != shstk_enabled) { found_shstk_legacy = true; diff --git a/sysdeps/x86/dl-prop.h b/sysdeps/x86/dl-prop.h index ce1667dc7a..56bd020b3c 100644 --- a/sysdeps/x86/dl-prop.h +++ b/sysdeps/x86/dl-prop.h @@ -19,14 +19,54 @@ #ifndef _DL_PROP_H #define _DL_PROP_H +#include <libintl.h> + extern void _dl_cet_check (struct link_map *, const char *) attribute_hidden; extern void _dl_cet_open_check (struct link_map *) attribute_hidden; +static void +dl_isa_level_check (struct link_map *m, const char *program) +{ + const struct cpu_features *cpu_features = __get_cpu_features (); + unsigned int i; + struct link_map *l; + + i = m->l_searchlist.r_nlist; + while (i-- > 0) + { + /* Check each shared object to see if ISA level is compatible. */ + l = m->l_initfini[i]; + + /* Skip ISA level check if functions have been executed. */ + if (l->l_init_called) + continue; + +#ifdef SHARED + /* Skip ISA level check for ld.so since ld.so won't run if its ISA + level is higher than CPU. */ + if (l == &GL(dl_rtld_map) || l->l_real == &GL(dl_rtld_map)) + continue; +#endif + + if ((l->l_x86_isa_1_needed & cpu_features->isa_1) + != l->l_x86_isa_1_needed) + { + if (program) + _dl_fatal_printf ("%s: CPU ISA level is lower than required\n", + *l->l_name != '\0' ? l->l_name : program); + else + _dl_signal_error (0, l->l_name, "dlopen", + N_("CPU ISA level is lower than required")); + } + } +} + static inline void __attribute__ ((always_inline)) _rtld_main_check (struct link_map *m, const char *program) { + dl_isa_level_check (m, program); #if CET_ENABLED _dl_cet_check (m, program); #endif @@ -35,20 +75,18 @@ _rtld_main_check (struct link_map *m, const char *program) static inline void __attribute__ ((always_inline)) _dl_open_check (struct link_map *m) { + dl_isa_level_check (m, NULL); #if CET_ENABLED _dl_cet_open_check (m); #endif } static inline void __attribute__ ((unused)) -_dl_process_cet_property_note (struct link_map *l, - const ElfW(Nhdr) *note, - const ElfW(Addr) size, - const ElfW(Addr) align) +_dl_process_property_note (struct link_map *l, const ElfW(Nhdr) *note, + const ElfW(Addr) size, const ElfW(Addr) align) { -#if CET_ENABLED /* Skip if we have seen a NT_GNU_PROPERTY_TYPE_0 note before. */ - if (l->l_cet != lc_unknown) + if (l->l_property != lc_property_unknown) return; /* The NT_GNU_PROPERTY_TYPE_0 note must be aliged to 4 bytes in @@ -59,7 +97,8 @@ _dl_process_cet_property_note (struct link_map *l, const ElfW(Addr) start = (ElfW(Addr)) note; - unsigned int feature_1 = 0; + unsigned int feature_1_and = 0; + unsigned int isa_1_needed = 0; unsigned int last_type = 0; while ((ElfW(Addr)) (note + 1) - start < size) @@ -71,11 +110,11 @@ _dl_process_cet_property_note (struct link_map *l, { /* Stop if we see more than one GNU property note which may be generated by the older linker. */ - if (l->l_cet != lc_unknown) + if (l->l_property != lc_property_unknown) return; - /* Check CET status now. */ - l->l_cet = lc_none; + /* Check CET status and ISA levels now. */ + l->l_property = lc_property_none; /* Check for invalid property. */ if (note->n_descsz < 8 @@ -101,26 +140,37 @@ _dl_process_cet_property_note (struct link_map *l, last_type = type; - if (type == GNU_PROPERTY_X86_FEATURE_1_AND) + if (type == GNU_PROPERTY_X86_FEATURE_1_AND + || type == GNU_PROPERTY_X86_ISA_1_NEEDED) { - /* The size of GNU_PROPERTY_X86_FEATURE_1_AND is 4 - bytes. When seeing GNU_PROPERTY_X86_FEATURE_1_AND, - we stop the search regardless if its size is correct - or not. There is no point to continue if this note - is ill-formed. */ + /* The sizes of types which we are searching for are + 4 bytes. There is no point to continue if this + note is ill-formed. */ if (datasz != 4) return; - feature_1 = *(unsigned int *) ptr; - - /* Keep searching for the next GNU property note - |
