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| author | Feng Xue <fxue@os.amperecomputing.com> | 2018-08-09 04:38:03 -0400 |
|---|---|---|
| committer | Feng Xue <fxue@os.amperecomputing.com> | 2019-02-01 08:14:21 -0500 |
| commit | 83d1cc42d8e6b18a4b6ba53addfdae98c694ea36 (patch) | |
| tree | 31baf4b5309964aadf357cb81b21f5e6614a983e /ChangeLog | |
| parent | c7d3890ff51bceb38fac0947ce1f2bb0c34f6b15 (diff) | |
| download | glibc-83d1cc42d8e6b18a4b6ba53addfdae98c694ea36.tar.xz glibc-83d1cc42d8e6b18a4b6ba53addfdae98c694ea36.zip | |
aarch64: Optimized memchr specific to AmpereComputing emag
This version uses general register based memory instruction to load
data, because vector register based is slightly slower in emag.
Character-matching is performed on 16-byte (both size and alignment)
memory block in parallel each iteration.
* sysdeps/aarch64/memchr.S (__memchr): Rename to MEMCHR.
[!MEMCHR](MEMCHR): Set to __memchr.
* sysdeps/aarch64/multiarch/Makefile (sysdep_routines):
Add memchr_generic and memchr_nosimd.
* sysdeps/aarch64/multiarch/ifunc-impl-list.c
(__libc_ifunc_impl_list): Add memchr ifuncs.
* sysdeps/aarch64/multiarch/memchr.c: New file.
* sysdeps/aarch64/multiarch/memchr_generic.S: Likewise.
* sysdeps/aarch64/multiarch/memchr_nosimd.S: Likewise.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 12 |
1 files changed, 12 insertions, 0 deletions
@@ -1,5 +1,17 @@ 2019-02-01 Feng Xue <fxue@os.amperecomputing.com> + * sysdeps/aarch64/memchr.S (__memchr): Rename to MEMCHR. + [!MEMCHR](MEMCHR): Set to __memchr. + * sysdeps/aarch64/multiarch/Makefile (sysdep_routines): + Add memchr_generic and memchr_nosimd. + * sysdeps/aarch64/multiarch/ifunc-impl-list.c + (__libc_ifunc_impl_list): Add memchr ifuncs. + * sysdeps/aarch64/multiarch/memchr.c: New file. + * sysdeps/aarch64/multiarch/memchr_generic.S: Likewise. + * sysdeps/aarch64/multiarch/memchr_nosimd.S: Likewise. + +2019-02-01 Feng Xue <fxue@os.amperecomputing.com> + * sysdeps/aarch64/multiarch/Makefile (sysdep_routines): Add memset_emag. * sysdeps/aarch64/multiarch/ifunc-impl-list.c |