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| author | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 09:21:32 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 14:46:10 -0700 |
| commit | fb90dc8513f67d1cc0578452aee3459e9b9ab626 (patch) | |
| tree | c40b25f3cd7dde99191abb96f235f5a8ac0bdc62 /sysdeps/x86/bits | |
| parent | f47b7d96fbecc6a81c144e7d152b1cb748efd682 (diff) | |
| download | glibc-fb90dc8513f67d1cc0578452aee3459e9b9ab626.tar.xz glibc-fb90dc8513f67d1cc0578452aee3459e9b9ab626.zip | |
<sys/platform/x86.h>: Add LBR support
Add architectural LBR support to <sys/platform/x86.h>.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
Diffstat (limited to 'sysdeps/x86/bits')
| -rw-r--r-- | sysdeps/x86/bits/platform/x86.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 6d9dd6dacf..1040c2aed4 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -219,7 +219,7 @@ enum x86_cpu_TSXLDTRK = x86_cpu_index_7_edx + 16, x86_cpu_INDEX_7_EDX_17 = x86_cpu_index_7_edx + 17, x86_cpu_PCONFIG = x86_cpu_index_7_edx + 18, - x86_cpu_INDEX_7_EDX_19 = x86_cpu_index_7_edx + 19, + x86_cpu_LBR = x86_cpu_index_7_edx + 19, x86_cpu_IBT = x86_cpu_index_7_edx + 20, x86_cpu_INDEX_7_EDX_21 = x86_cpu_index_7_edx + 21, x86_cpu_AMX_BF16 = x86_cpu_index_7_edx + 22, |