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path: root/sysdeps/x86/cpu-features.c
AgeCommit message (Expand)AuthorFilesLines
2025-04-12x86: Detect Intel Diamond RapidsH.J. Lu1-0/+12
2025-04-11x86: Handle unknown Intel processor with default tuningSunil K Pandey1-144/+143
2025-04-10x86: Add ARL/PTL/CWF model detection supportSunil K Pandey1-0/+10
2025-04-05x86: Optimize xstate size calculationSunil K Pandey1-56/+18
2025-03-29x86: Use separate variable for TLSDESC XSAVE/XSAVEC state size (bug 32810)Florian Weimer1-5/+6
2025-03-29x86: Skip XSAVE state size reset if ISA level requires XSAVEFlorian Weimer1-0/+5
2025-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2024-08-26x86: Enable non-temporal memset for Hygon processorsFeifei Wang1-2/+7
2024-08-26x86: Add new architecture type for Hygon processorsFeifei Wang1-3/+16
2024-08-15x86: Add `Avoid_STOSB` tunable to allow NT memset without ERMSNoah Goldstein1-0/+4
2024-08-15x86: Use `Avoid_Non_Temporal_Memset` to control non-temporal pathNoah Goldstein1-0/+16
2024-08-02x86: Add missing switch/case fall-through markers to init_cpu_featuresFlorian Weimer1-0/+2
2024-07-16x86: Disable non-temporal memset on Skylake ServerNoah Goldstein1-3/+10
2024-06-30x86: Set default non_temporal_threshold for Zhaoxin processorsMayShao-oc1-0/+1
2024-06-30x86: Set preferred CPU features on the KH-40000 and KX-7000 Zhaoxin processorsMayShao-oc1-16/+35
2024-03-18x86-64: Allocate state buffer space for RDI, RSI and RBXH.J. Lu1-4/+7
2024-03-03x86-64: Simplify minimum ISA check ifdef conditional with ifSunil K Pandey1-11/+8
2024-02-29x86-64: Update _dl_tlsdesc_dynamic to preserve AMX registersH.J. Lu1-2/+53
2024-02-28x86-64: Don't use SSE resolvers for ISA level 3 or aboveH.J. Lu1-6/+11
2024-02-28x86: Update _dl_tlsdesc_dynamic to preserve caller-saved registersH.J. Lu1-2/+54
2024-01-15x86-64: Check if mprotect works before rewriting PLTH.J. Lu1-1/+7
2024-01-10i386: Remove CET support bitsH.J. Lu1-1/+3
2024-01-05elf: Add ELF_DYNAMIC_AFTER_RELOC to rewrite PLTH.J. Lu1-1/+20
2024-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2024-01-01x86/cet: Don't set CET active by defaultH.J. Lu1-1/+1
2024-01-01x86/cet: Enable shadow stack during startupH.J. Lu1-51/+0
2024-01-01x86/cet: Sync with Linux kernel 6.6 shadow stack interfaceH.J. Lu1-5/+10
2023-09-29x86: Add support for AVX10 preset and vec size in cpu-featuresNoah Goldstein1-0/+25
2023-07-27<sys/platform/x86.h>: Add APX supportH.J. Lu1-0/+4
2023-06-19Fix misspellings -- BZ 25337Paul Pluzhnikov1-1/+1
2023-06-12x86: Make the divisor in setting `non_temporal_threshold` cpu specificNoah Goldstein1-9/+22
2023-06-12x86: Refactor Intel `init_cpu_features`Noah Goldstein1-81/+309
2023-05-30Fix misspellings in sysdeps/ -- BZ 25337Paul Pluzhnikov1-1/+1
2023-04-05<sys/platform/x86.h>: Add PREFETCHI supportH.J. Lu1-0/+1
2023-04-05<sys/platform/x86.h>: Add AMX-COMPLEX supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-NE-CONVERT supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-VNNI-INT8 supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-IFMA supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add AMX-FP16 supportH.J. Lu1-0/+2
2023-04-05<sys/platform/x86.h>: Add CMPCCXADD supportH.J. Lu1-0/+1
2023-04-05<sys/platform/x86.h>: Add RAO-INT supportH.J. Lu1-0/+1
2023-04-03x86: Set FSGSBASE to active if enabled by kernelH.J. Lu1-0/+3
2023-03-29Remove --enable-tunables configure optionAdhemerval Zanella Netto1-19/+5
2023-02-22x86-64: Add glibc.cpu.prefer_map_32bit_exec [BZ #28656]H.J. Lu1-0/+15
2023-01-06Update copyright dates with scripts/update-copyrightsJoseph Myers1-1/+1
2022-01-18x86: Black list more Intel CPUs for TSX [BZ #27398]H.J. Lu1-3/+31
2022-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2021-12-06x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNIH.J. Lu1-2/+5
2021-11-01x86-64: Remove Prefer_AVX2_STRCMPH.J. Lu1-8/+0
2021-07-28x86-64: Add Avoid_Short_Distance_REP_MOVSBH.J. Lu1-0/+5
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