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authorSunil K Pandey <skpgkp2@gmail.com>2021-12-29 09:11:23 -0800
committerSunil K Pandey <skpgkp2@gmail.com>2021-12-29 11:38:02 -0800
commit2bf02c5843896c5c109b1467c64ecf11cbc2ad7b (patch)
treea313322b85bfd099aafaffd55c2f96abdd8e584c
parentaa1809a1dfde88e5df73edba14b30e488b267343 (diff)
downloadglibc-2bf02c5843896c5c109b1467c64ecf11cbc2ad7b.tar.xz
glibc-2bf02c5843896c5c109b1467c64ecf11cbc2ad7b.zip
x86-64: Add vector cbrt/cbrtf implementation to libmvec
Implement vectorized cbrt/cbrtf containing SSE, AVX, AVX2 and AVX512 versions for libmvec as per vector ABI. It also contains accuracy and ABI tests for vector cbrt/cbrtf with regenerated ulps. Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
-rw-r--r--bits/libm-simd-decl-stubs.h11
-rw-r--r--math/bits/mathcalls.h2
-rw-r--r--sysdeps/unix/sysv/linux/x86_64/libmvec.abilist8
-rw-r--r--sysdeps/x86/fpu/bits/math-vector.h4
-rw-r--r--sysdeps/x86/fpu/finclude/math-vector-fortran.h4
-rw-r--r--sysdeps/x86_64/fpu/Makeconfig1
-rw-r--r--sysdeps/x86_64/fpu/Versions2
-rw-r--r--sysdeps/x86_64/fpu/libm-test-ulps20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core-sse2.S20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core.c27
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core_sse4.S467
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt4_core-sse.S20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt4_core.c27
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt4_core_avx2.S505
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core-avx2.S20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core.c27
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_d_cbrt8_core_avx512.S253
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf16_core-avx2.S20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf16_core.c28
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf16_core_avx512.S235
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf4_core-sse2.S20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf4_core.c28
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf4_core_sse4.S490
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf8_core-sse.S20
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf8_core.c28
-rw-r--r--sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf8_core_avx2.S509
-rw-r--r--sysdeps/x86_64/fpu/svml_d_cbrt2_core.S29
-rw-r--r--sysdeps/x86_64/fpu/svml_d_cbrt4_core.S29
-rw-r--r--sysdeps/x86_64/fpu/svml_d_cbrt4_core_avx.S25
-rw-r--r--sysdeps/x86_64/fpu/svml_d_cbrt8_core.S25
-rw-r--r--sysdeps/x86_64/fpu/svml_s_cbrtf16_core.S25
-rw-r--r--sysdeps/x86_64/fpu/svml_s_cbrtf4_core.S29
-rw-r--r--sysdeps/x86_64/fpu/svml_s_cbrtf8_core.S29
-rw-r--r--sysdeps/x86_64/fpu/svml_s_cbrtf8_core_avx.S25
-rw-r--r--sysdeps/x86_64/fpu/test-double-libmvec-cbrt-avx.c1
-rw-r--r--sysdeps/x86_64/fpu/test-double-libmvec-cbrt-avx2.c1
-rw-r--r--sysdeps/x86_64/fpu/test-double-libmvec-cbrt-avx512f.c1
-rw-r--r--sysdeps/x86_64/fpu/test-double-libmvec-cbrt.c3
-rw-r--r--sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-libmvec-cbrtf-avx.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-libmvec-cbrtf-avx2.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-libmvec-cbrtf-avx512f.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-libmvec-cbrtf.c3
-rw-r--r--sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c1
-rw-r--r--sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c1
50 files changed, 3031 insertions, 1 deletions
diff --git a/bits/libm-simd-decl-stubs.h b/bits/libm-simd-decl-stubs.h
index 6347320521..7f1304ed1d 100644
--- a/bits/libm-simd-decl-stubs.h
+++ b/bits/libm-simd-decl-stubs.h
@@ -197,4 +197,15 @@
#define __DECL_SIMD_sinhf32x
#define __DECL_SIMD_sinhf64x
#define __DECL_SIMD_sinhf128x
+
+#define __DECL_SIMD_cbrt
+#define __DECL_SIMD_cbrtf
+#define __DECL_SIMD_cbrtl
+#define __DECL_SIMD_cbrtf16
+#define __DECL_SIMD_cbrtf32
+#define __DECL_SIMD_cbrtf64
+#define __DECL_SIMD_cbrtf128
+#define __DECL_SIMD_cbrtf32x
+#define __DECL_SIMD_cbrtf64x
+#define __DECL_SIMD_cbrtf128x
#endif
diff --git a/math/bits/mathcalls.h b/math/bits/mathcalls.h
index 673b3a93ba..26d18f0135 100644
--- a/math/bits/mathcalls.h
+++ b/math/bits/mathcalls.h
@@ -149,7 +149,7 @@ __MATHCALL_VEC (hypot,, (_Mdouble_ __x, _Mdouble_ __y));
#if defined __USE_XOPEN_EXTENDED || defined __USE_ISOC99
/* Return the cube root of X. */
-__MATHCALL (cbrt,, (_Mdouble_ __x));
+__MATHCALL_VEC (cbrt,, (_Mdouble_ __x));
#endif
diff --git a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
index f9d7b085ab..a6558d9810 100644
--- a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
+++ b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
@@ -49,6 +49,7 @@ GLIBC_2.22 _ZGVeN8vvv_sincos F
GLIBC_2.35 _ZGVbN2v_acos F
GLIBC_2.35 _ZGVbN2v_asin F
GLIBC_2.35 _ZGVbN2v_atan F
+GLIBC_2.35 _ZGVbN2v_cbrt F
GLIBC_2.35 _ZGVbN2v_cosh F
GLIBC_2.35 _ZGVbN2v_exp10 F
GLIBC_2.35 _ZGVbN2v_exp2 F
@@ -58,6 +59,7 @@ GLIBC_2.35 _ZGVbN2vv_hypot F
GLIBC_2.35 _ZGVbN4v_acosf F
GLIBC_2.35 _ZGVbN4v_asinf F
GLIBC_2.35 _ZGVbN4v_atanf F
+GLIBC_2.35 _ZGVbN4v_cbrtf F
GLIBC_2.35 _ZGVbN4v_coshf F
GLIBC_2.35 _ZGVbN4v_exp10f F
GLIBC_2.35 _ZGVbN4v_exp2f F
@@ -67,6 +69,7 @@ GLIBC_2.35 _ZGVbN4vv_hypotf F
GLIBC_2.35 _ZGVcN4v_acos F
GLIBC_2.35 _ZGVcN4v_asin F
GLIBC_2.35 _ZGVcN4v_atan F
+GLIBC_2.35 _ZGVcN4v_cbrt F
GLIBC_2.35 _ZGVcN4v_cosh F
GLIBC_2.35 _ZGVcN4v_exp10 F
GLIBC_2.35 _ZGVcN4v_exp2 F
@@ -76,6 +79,7 @@ GLIBC_2.35 _ZGVcN4vv_hypot F
GLIBC_2.35 _ZGVcN8v_acosf F
GLIBC_2.35 _ZGVcN8v_asinf F
GLIBC_2.35 _ZGVcN8v_atanf F
+GLIBC_2.35 _ZGVcN8v_cbrtf F
GLIBC_2.35 _ZGVcN8v_coshf F
GLIBC_2.35 _ZGVcN8v_exp10f F
GLIBC_2.35 _ZGVcN8v_exp2f F
@@ -85,6 +89,7 @@ GLIBC_2.35 _ZGVcN8vv_hypotf F
GLIBC_2.35 _ZGVdN4v_acos F
GLIBC_2.35 _ZGVdN4v_asin F
GLIBC_2.35 _ZGVdN4v_atan F
+GLIBC_2.35 _ZGVdN4v_cbrt F
GLIBC_2.35 _ZGVdN4v_cosh F
GLIBC_2.35 _ZGVdN4v_exp10 F
GLIBC_2.35 _ZGVdN4v_exp2 F
@@ -94,6 +99,7 @@ GLIBC_2.35 _ZGVdN4vv_hypot F
GLIBC_2.35 _ZGVdN8v_acosf F
GLIBC_2.35 _ZGVdN8v_asinf F
GLIBC_2.35 _ZGVdN8v_atanf F
+GLIBC_2.35 _ZGVdN8v_cbrtf F
GLIBC_2.35 _ZGVdN8v_coshf F
GLIBC_2.35 _ZGVdN8v_exp10f F
GLIBC_2.35 _ZGVdN8v_exp2f F
@@ -103,6 +109,7 @@ GLIBC_2.35 _ZGVdN8vv_hypotf F
GLIBC_2.35 _ZGVeN16v_acosf F
GLIBC_2.35 _ZGVeN16v_asinf F
GLIBC_2.35 _ZGVeN16v_atanf F
+GLIBC_2.35 _ZGVeN16v_cbrtf F
GLIBC_2.35 _ZGVeN16v_coshf F
GLIBC_2.35 _ZGVeN16v_exp10f F
GLIBC_2.35 _ZGVeN16v_exp2f F
@@ -112,6 +119,7 @@ GLIBC_2.35 _ZGVeN16vv_hypotf F
GLIBC_2.35 _ZGVeN8v_acos F
GLIBC_2.35 _ZGVeN8v_asin F
GLIBC_2.35 _ZGVeN8v_atan F
+GLIBC_2.35 _ZGVeN8v_cbrt F
GLIBC_2.35 _ZGVeN8v_cosh F
GLIBC_2.35 _ZGVeN8v_exp10 F
GLIBC_2.35 _ZGVeN8v_exp2 F
diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h
index 51a41cfebc..dcd45934ab 100644
--- a/sysdeps/x86/fpu/bits/math-vector.h
+++ b/sysdeps/x86/fpu/bits/math-vector.h
@@ -94,6 +94,10 @@
# define __DECL_SIMD_sinh __DECL_SIMD_x86_64
# undef __DECL_SIMD_sinhf
# define __DECL_SIMD_sinhf __DECL_SIMD_x86_64
+# undef __DECL_SIMD_cbrt
+# define __DECL_SIMD_cbrt __DECL_SIMD_x86_64
+# undef __DECL_SIMD_cbrtf
+# define __DECL_SIMD_cbrtf __DECL_SIMD_x86_64
# endif
#endif
diff --git a/sysdeps/x86/fpu/finclude/math-vector-fortran.h b/sysdeps/x86/fpu/finclude/math-vector-fortran.h
index 91e9b4fc83..dfb5f13ea3 100644
--- a/sysdeps/x86/fpu/finclude/math-vector-fortran.h
+++ b/sysdeps/x86/fpu/finclude/math-vector-fortran.h
@@ -46,6 +46,8 @@
!GCC$ builtin (expm1f) attributes simd (notinbranch) if('x86_64')
!GCC$ builtin (sinh) attributes simd (notinbranch) if('x86_64')
!GCC$ builtin (sinhf) attributes simd (notinbranch) if('x86_64')
+!GCC$ builtin (cbrt) attributes simd (notinbranch) if('x86_64')
+!GCC$ builtin (cbrtf) attributes simd (notinbranch) if('x86_64')
!GCC$ builtin (cos) attributes simd (notinbranch) if('x32')
!GCC$ builtin (cosf) attributes simd (notinbranch) if('x32')
@@ -77,3 +79,5 @@
!GCC$ builtin (expm1f) attributes simd (notinbranch) if('x32')
!GCC$ builtin (sinh) attributes simd (notinbranch) if('x32')
!GCC$ builtin (sinhf) attributes simd (notinbranch) if('x32')
+!GCC$ builtin (cbrt) attributes simd (notinbranch) if('x32')
+!GCC$ builtin (cbrtf) attributes simd (notinbranch) if('x32')
diff --git a/sysdeps/x86_64/fpu/Makeconfig b/sysdeps/x86_64/fpu/Makeconfig
index 81e9fc95b2..dde737c0d6 100644
--- a/sysdeps/x86_64/fpu/Makeconfig
+++ b/sysdeps/x86_64/fpu/Makeconfig
@@ -25,6 +25,7 @@ libmvec-funcs = \
acos \
asin \
atan \
+ cbrt \
cos \
cosh \
exp \
diff --git a/sysdeps/x86_64/fpu/Versions b/sysdeps/x86_64/fpu/Versions
index 2710446d12..b70aeb3e2f 100644
--- a/sysdeps/x86_64/fpu/Versions
+++ b/sysdeps/x86_64/fpu/Versions
@@ -17,6 +17,7 @@ libmvec {
_ZGVbN2v_acos; _ZGVcN4v_acos; _ZGVdN4v_acos; _ZGVeN8v_acos;
_ZGVbN2v_asin; _ZGVcN4v_asin; _ZGVdN4v_asin; _ZGVeN8v_asin;
_ZGVbN2v_atan; _ZGVcN4v_atan; _ZGVdN4v_atan; _ZGVeN8v_atan;
+ _ZGVbN2v_cbrt; _ZGVcN4v_cbrt; _ZGVdN4v_cbrt; _ZGVeN8v_cbrt;
_ZGVbN2v_cosh; _ZGVcN4v_cosh; _ZGVdN4v_cosh; _ZGVeN8v_cosh;
_ZGVbN2v_exp10; _ZGVcN4v_exp10; _ZGVdN4v_exp10; _ZGVeN8v_exp10;
_ZGVbN2v_exp2; _ZGVcN4v_exp2; _ZGVdN4v_exp2; _ZGVeN8v_exp2;
@@ -26,6 +27,7 @@ libmvec {
_ZGVbN4v_acosf; _ZGVcN8v_acosf; _ZGVdN8v_acosf; _ZGVeN16v_acosf;
_ZGVbN4v_asinf; _ZGVcN8v_asinf; _ZGVdN8v_asinf; _ZGVeN16v_asinf;
_ZGVbN4v_atanf; _ZGVcN8v_atanf; _ZGVdN8v_atanf; _ZGVeN16v_atanf;
+ _ZGVbN4v_cbrtf; _ZGVcN8v_cbrtf; _ZGVdN8v_cbrtf; _ZGVeN16v_cbrtf;
_ZGVbN4v_coshf; _ZGVcN8v_coshf; _ZGVdN8v_coshf; _ZGVeN16v_coshf;
_ZGVbN4v_exp10f; _ZGVcN8v_exp10f; _ZGVdN8v_exp10f; _ZGVeN16v_exp10f;
_ZGVbN4v_exp2f; _ZGVcN8v_exp2f; _ZGVdN8v_exp2f; _ZGVeN16v_exp2f;
diff --git a/sysdeps/x86_64/fpu/libm-test-ulps b/sysdeps/x86_64/fpu/libm-test-ulps
index f4b313119d..e039a993df 100644
--- a/sysdeps/x86_64/fpu/libm-test-ulps
+++ b/sysdeps/x86_64/fpu/libm-test-ulps
@@ -583,6 +583,26 @@ float: 1
float128: 1
ldouble: 1
+Function: "cbrt_vlen16":
+float: 1
+
+Function: "cbrt_vlen2":
+double: 1
+
+Function: "cbrt_vlen4":
+double: 1
+float: 2
+
+Function: "cbrt_vlen4_avx2":
+double: 1
+
+Function: "cbrt_vlen8":
+double: 1
+float: 2
+
+Function: "cbrt_vlen8_avx2":
+float: 2
+
Function: Real part of "ccos":
double: 1
float: 1
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core-sse2.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core-sse2.S
new file mode 100644
index 0000000000..60f4c46a11
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core-sse2.S
@@ -0,0 +1,20 @@
+/* SSE2 version of vectorized cbrt, vector length is 2.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <https://www.gnu.org/licenses/>. */
+
+#define _ZGVbN2v_cbrt _ZGVbN2v_cbrt_sse2
+#include "../svml_d_cbrt2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core.c b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core.c
new file mode 100644
index 0000000000..07390b7150
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core.c
@@ -0,0 +1,27 @@
+/* Multiple versions of vectorized cbrt, vector length is 2.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <https://www.gnu.org/licenses/>. */
+
+#define SYMBOL_NAME _ZGVbN2v_cbrt
+#include "ifunc-mathvec-sse4_1.h"
+
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
+
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_cbrt, __GI__ZGVbN2v_cbrt, __redirect__ZGVbN2v_cbrt)
+ __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core_sse4.S
new file mode 100644
index 0000000000..72ecb25e05
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cbrt2_core_sse4.S
@@ -0,0 +1,467 @@